Residue Number Systems: Algorithms and Architectures
There has been continuing interest in the improvement of the speed of Digital Signal processing. The use of Residue Number Systems for the design of DSP systems has been extensively researched in literature. Szabo and Tanaka have popularized this approach through their book published in 1967. Subseq...
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| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Boston, MA
Springer US
2002
|
| Schriftenreihe: | The Springer International Series in Engineering and Computer Science
677 |
| Schlagworte: | |
| Online-Zugang: | FHI01 BTU01 Volltext |
| Zusammenfassung: | There has been continuing interest in the improvement of the speed of Digital Signal processing. The use of Residue Number Systems for the design of DSP systems has been extensively researched in literature. Szabo and Tanaka have popularized this approach through their book published in 1967. Subsequently, Jenkins and Leon have rekindled the interest of researchers in this area in 1978, from which time there have been several efforts to use RNS in practical system implementation. An IEEE Press book has been published in 1986 which was a collection of Papers. It is very interesting to note that in the recent past since 1988, the research activity has received a new thrust with emphasis on VLSI design using non ROM based designs as well as ROM based designs as evidenced by the increased publications in this area. The main advantage in using RNS is that several small word-length Processors are used to perform operations such as addition, multiplication and accumulation, subtraction, thus needing less instruction execution time than that needed in conventional 16 bitl32 bit DSPs. However, the disadvantages of RNS have b. een the difficulty of detection of overflow, sign detection, comparison of two numbers, scaling, and division by arbitrary number, RNS to Binary conversion and Binary to RNS conversion. These operations, unfortunately, are computationally intensive and are time consuming |
| Beschreibung: | 1 Online-Ressource (XIII, 253 p) |
| ISBN: | 9781461509974 |
| DOI: | 10.1007/978-1-4615-0997-4 |
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| 520 | |a There has been continuing interest in the improvement of the speed of Digital Signal processing. The use of Residue Number Systems for the design of DSP systems has been extensively researched in literature. Szabo and Tanaka have popularized this approach through their book published in 1967. Subsequently, Jenkins and Leon have rekindled the interest of researchers in this area in 1978, from which time there have been several efforts to use RNS in practical system implementation. An IEEE Press book has been published in 1986 which was a collection of Papers. It is very interesting to note that in the recent past since 1988, the research activity has received a new thrust with emphasis on VLSI design using non ROM based designs as well as ROM based designs as evidenced by the increased publications in this area. The main advantage in using RNS is that several small word-length Processors are used to perform operations such as addition, multiplication and accumulation, subtraction, thus needing less instruction execution time than that needed in conventional 16 bitl32 bit DSPs. However, the disadvantages of RNS have b. een the difficulty of detection of overflow, sign detection, comparison of two numbers, scaling, and division by arbitrary number, RNS to Binary conversion and Binary to RNS conversion. These operations, unfortunately, are computationally intensive and are time consuming | ||
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Datensatz im Suchindex
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| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| doi_str_mv | 10.1007/978-1-4615-0997-4 |
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| isbn | 9781461509974 |
| language | English |
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| spelling | Mohan, P. V. Ananda Verfasser aut Residue Number Systems Algorithms and Architectures by P. V. Ananda Mohan Boston, MA Springer US 2002 1 Online-Ressource (XIII, 253 p) txt rdacontent c rdamedia cr rdacarrier The Springer International Series in Engineering and Computer Science 677 There has been continuing interest in the improvement of the speed of Digital Signal processing. The use of Residue Number Systems for the design of DSP systems has been extensively researched in literature. Szabo and Tanaka have popularized this approach through their book published in 1967. Subsequently, Jenkins and Leon have rekindled the interest of researchers in this area in 1978, from which time there have been several efforts to use RNS in practical system implementation. An IEEE Press book has been published in 1986 which was a collection of Papers. It is very interesting to note that in the recent past since 1988, the research activity has received a new thrust with emphasis on VLSI design using non ROM based designs as well as ROM based designs as evidenced by the increased publications in this area. The main advantage in using RNS is that several small word-length Processors are used to perform operations such as addition, multiplication and accumulation, subtraction, thus needing less instruction execution time than that needed in conventional 16 bitl32 bit DSPs. However, the disadvantages of RNS have b. een the difficulty of detection of overflow, sign detection, comparison of two numbers, scaling, and division by arbitrary number, RNS to Binary conversion and Binary to RNS conversion. These operations, unfortunately, are computationally intensive and are time consuming Engineering Circuits and Systems Signal, Image and Speech Processing Electrical Engineering Electrical engineering Electronic circuits Modularithmetik (DE-588)4325008-7 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf VLSI (DE-588)4117388-0 s Modularithmetik (DE-588)4325008-7 s 1\p DE-604 Erscheint auch als Druck-Ausgabe 9781461353430 https://doi.org/10.1007/978-1-4615-0997-4 Verlag URL des Erstveröffentlichers Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Mohan, P. V. Ananda Residue Number Systems Algorithms and Architectures Engineering Circuits and Systems Signal, Image and Speech Processing Electrical Engineering Electrical engineering Electronic circuits Modularithmetik (DE-588)4325008-7 gnd VLSI (DE-588)4117388-0 gnd |
| subject_GND | (DE-588)4325008-7 (DE-588)4117388-0 |
| title | Residue Number Systems Algorithms and Architectures |
| title_auth | Residue Number Systems Algorithms and Architectures |
| title_exact_search | Residue Number Systems Algorithms and Architectures |
| title_full | Residue Number Systems Algorithms and Architectures by P. V. Ananda Mohan |
| title_fullStr | Residue Number Systems Algorithms and Architectures by P. V. Ananda Mohan |
| title_full_unstemmed | Residue Number Systems Algorithms and Architectures by P. V. Ananda Mohan |
| title_short | Residue Number Systems |
| title_sort | residue number systems algorithms and architectures |
| title_sub | Algorithms and Architectures |
| topic | Engineering Circuits and Systems Signal, Image and Speech Processing Electrical Engineering Electrical engineering Electronic circuits Modularithmetik (DE-588)4325008-7 gnd VLSI (DE-588)4117388-0 gnd |
| topic_facet | Engineering Circuits and Systems Signal, Image and Speech Processing Electrical Engineering Electrical engineering Electronic circuits Modularithmetik VLSI |
| url | https://doi.org/10.1007/978-1-4615-0997-4 |
| work_keys_str_mv | AT mohanpvananda residuenumbersystemsalgorithmsandarchitectures |