This work began in 1995 as an outgrowth of the InfoPad project which showed us that in order to reduce the energy consumption of a portable multimedia terminal that something had to be done about the consumption of the microprocessor subsystem. The design of the InfoPad attempted to reduce the requi...

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Bibliographische Detailangaben

Hauptverfasser:	Burd, Thomas D. (VerfasserIn), Brodersen, Robert W. (VerfasserIn)
Format:	Elektronisch E-Book
Sprache:	English
Veröffentlicht:	Boston, MA Springer US 2002
Schlagworte:	Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Processor Architectures Microprocessors Computer-aided engineering Electrical engineering Electronic circuits Energieeinsparung Mikroprozessor Hardwareentwurf
Online-Zugang:	FHI01 BTU01 Volltext
Zusammenfassung:	This work began in 1995 as an outgrowth of the InfoPad project which showed us that in order to reduce the energy consumption of a portable multimedia terminal that something had to be done about the consumption of the microprocessor subsystem. The design of the InfoPad attempted to reduce the requirements of this general pur­ pose processor by moving the computation into the network or by the use of highly optimized integrated circuits, but in spite of these efforts it still was a major consumer of energy. The reasons for this became apparent as we determined that the energy required to perform a function in dedicated hardware could be several orders of magnitude lower than that consumed in the InfoPad microprocessor. We therefore set out on a full fledged attack on all aspects of the microprocessor energy consumption [1 J. After considerable analysis it became clear that though better circuit design and a stream­ lined architecture would assist in our goal of energy reduction, that the biggest gains were to be found by operating at reduced voltages. For the busses and VO this could be accomplished without significant degradation of the processor performance, but this was not a straightforward solution when applied to the core of the processor sub­ system (CPU and memory)
Beschreibung:	1 Online-Ressource (XII, 357 p)
ISBN:	9781461508755
DOI:	10.1007/978-1-4615-0875-5