Parasitic-Aware Optimization of CMOS RF Circuits:
In the arena of Parasitic-Aware Design of CMOS RF Circuits, efforts are aimed at the realization of true single-chip radios with few, if any, off-chip components. Ironically, the on-chip passive components required for RF integration pose miore serious challenges to SOC integration than the active C...
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Hauptverfasser: | , , |
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Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
Boston, MA
Springer US
2003
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Schlagworte: | |
Online-Zugang: | FHI01 BTU01 Volltext |
Zusammenfassung: | In the arena of Parasitic-Aware Design of CMOS RF Circuits, efforts are aimed at the realization of true single-chip radios with few, if any, off-chip components. Ironically, the on-chip passive components required for RF integration pose miore serious challenges to SOC integration than the active CMOS and BJT devices. This is not surprising since modern digital IC designs are dominated as much, or more, by interconnectg characteristics than by active device properties. In any event, the co-integration of active and passive devices in RFIC design represents a serious design problem and an even more daunting manufacturing challenge. If conventional mixed-signal design techniques are employed, parasitics associated with passive elements (resistors, capacitors, inductors, transformers, pads, etc.) and the package effectively de-tune RF circuits rendering them sub-optimal or virtually useless. Hence, dealing with parasitics in an effective way as part of the design process is an essential emerging methodology in modern SOC design. The parasitic-aware RF circuit synthesis techinques described in this book effectively address this critical problem |
Beschreibung: | 1 Online-Ressource (XVII, 162 p. 28 illus) |
ISBN: | 9780306481291 |
DOI: | 10.1007/b101853 |
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Datensatz im Suchindex
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any_adam_object | |
author | Allstot, David J. Choi, Kiyong Park, Jinho |
author_facet | Allstot, David J. Choi, Kiyong Park, Jinho |
author_role | aut aut aut |
author_sort | Allstot, David J. |
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dewey-raw | 621.3815 |
dewey-search | 621.3815 |
dewey-sort | 3621.3815 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
doi_str_mv | 10.1007/b101853 |
format | Electronic eBook |
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illustrated | Not Illustrated |
indexdate | 2024-07-10T08:10:01Z |
institution | BVB |
isbn | 9780306481291 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030538244 |
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physical | 1 Online-Ressource (XVII, 162 p. 28 illus) |
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spelling | Allstot, David J. Verfasser aut Parasitic-Aware Optimization of CMOS RF Circuits by David J. Allstot, Kiyong Choi, Jinho Park Boston, MA Springer US 2003 1 Online-Ressource (XVII, 162 p. 28 illus) txt rdacontent c rdamedia cr rdacarrier In the arena of Parasitic-Aware Design of CMOS RF Circuits, efforts are aimed at the realization of true single-chip radios with few, if any, off-chip components. Ironically, the on-chip passive components required for RF integration pose miore serious challenges to SOC integration than the active CMOS and BJT devices. This is not surprising since modern digital IC designs are dominated as much, or more, by interconnectg characteristics than by active device properties. In any event, the co-integration of active and passive devices in RFIC design represents a serious design problem and an even more daunting manufacturing challenge. If conventional mixed-signal design techniques are employed, parasitics associated with passive elements (resistors, capacitors, inductors, transformers, pads, etc.) and the package effectively de-tune RF circuits rendering them sub-optimal or virtually useless. Hence, dealing with parasitics in an effective way as part of the design process is an essential emerging methodology in modern SOC design. The parasitic-aware RF circuit synthesis techinques described in this book effectively address this critical problem Engineering Circuits and Systems Electrical Engineering Electrical engineering Electronic circuits Choi, Kiyong aut Park, Jinho aut Erscheint auch als Druck-Ausgabe 9781402073991 https://doi.org/10.1007/b101853 Verlag URL des Erstveröffentlichers Volltext |
spellingShingle | Allstot, David J. Choi, Kiyong Park, Jinho Parasitic-Aware Optimization of CMOS RF Circuits Engineering Circuits and Systems Electrical Engineering Electrical engineering Electronic circuits |
title | Parasitic-Aware Optimization of CMOS RF Circuits |
title_auth | Parasitic-Aware Optimization of CMOS RF Circuits |
title_exact_search | Parasitic-Aware Optimization of CMOS RF Circuits |
title_full | Parasitic-Aware Optimization of CMOS RF Circuits by David J. Allstot, Kiyong Choi, Jinho Park |
title_fullStr | Parasitic-Aware Optimization of CMOS RF Circuits by David J. Allstot, Kiyong Choi, Jinho Park |
title_full_unstemmed | Parasitic-Aware Optimization of CMOS RF Circuits by David J. Allstot, Kiyong Choi, Jinho Park |
title_short | Parasitic-Aware Optimization of CMOS RF Circuits |
title_sort | parasitic aware optimization of cmos rf circuits |
topic | Engineering Circuits and Systems Electrical Engineering Electrical engineering Electronic circuits |
topic_facet | Engineering Circuits and Systems Electrical Engineering Electrical engineering Electronic circuits |
url | https://doi.org/10.1007/b101853 |
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