Closing the Gap Between ASIC & Custom: Tools and Techniques for High-Performance ASIC Design
by Kurt Keutzer Those looking for a quick overview of the book should fast-forward to the Introduction in Chapter 1. What follows is a personal account of the creation of this book. The challenge from Earl Killian, formerly an architect of the MIPS processors and at that time Chief Architect at Tens...
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| Hauptverfasser: | , |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Boston, MA
Springer US
2002
|
| Schlagworte: | |
| Online-Zugang: | FHI01 BTU01 URL des Erstveröffentlichers |
| Zusammenfassung: | by Kurt Keutzer Those looking for a quick overview of the book should fast-forward to the Introduction in Chapter 1. What follows is a personal account of the creation of this book. The challenge from Earl Killian, formerly an architect of the MIPS processors and at that time Chief Architect at Tensilica, was to explain the significant performance gap between ASICs and custom circuits designed in the same process generation. The relevance of the challenge was amplified shortly thereafter by Andy Bechtolsheim, founder of Sun Microsystems and ubiquitous investor in the EDA industry. At a dinner talk at the 1999 International Symposium on Physical Design, Andy stated that the greatest near-term opportunity in CAD was to develop tools to bring the performance of ASIC circuits closer to that of custom designs. There seemed to be some synchronicity that two individuals so different in concern and character would be pre-occupied with the same problem. Intrigued by Earl and Andy’s comments, the game was afoot. Earl Killian and other veterans of microprocessor design were helpful with clues as to the sources of the performance discrepancy: layout, circuit design, clocking methodology, and dynamic logic. I soon realized that I needed help in tracking down clues. Only at a wonderful institution like the University of California at Berkeley could I so easily commandeer an ab- bodied graduate student like David Chinnery with a knowledge of architecture, circuits, computer-aided design and algorithms |
| Beschreibung: | 1 Online-Ressource (XV, 414 p) |
| ISBN: | 9780306478239 |
| DOI: | 10.1007/b105287 |
Internformat
MARC
| LEADER | 00000nmm a2200000zc 4500 | ||
|---|---|---|---|
| 001 | BV045148515 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | cr|uuu---uuuuu | ||
| 008 | 180827s2002 |||| o||u| ||||||eng d | ||
| 020 | |a 9780306478239 |9 978-0-306-47823-9 | ||
| 024 | 7 | |a 10.1007/b105287 |2 doi | |
| 035 | |a (ZDB-2-ENG)978-0-306-47823-9 | ||
| 035 | |a (OCoLC)1050950092 | ||
| 035 | |a (DE-599)BVBBV045148515 | ||
| 040 | |a DE-604 |b ger |e aacr | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-573 |a DE-634 | ||
| 082 | 0 | |a 621.3815 |2 23 | |
| 100 | 1 | |a Chinnery, David |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Closing the Gap Between ASIC & Custom |b Tools and Techniques for High-Performance ASIC Design |c by David Chinnery, Kurt Keutzer |
| 264 | 1 | |a Boston, MA |b Springer US |c 2002 | |
| 300 | |a 1 Online-Ressource (XV, 414 p) | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b c |2 rdamedia | ||
| 338 | |b cr |2 rdacarrier | ||
| 520 | |a by Kurt Keutzer Those looking for a quick overview of the book should fast-forward to the Introduction in Chapter 1. What follows is a personal account of the creation of this book. The challenge from Earl Killian, formerly an architect of the MIPS processors and at that time Chief Architect at Tensilica, was to explain the significant performance gap between ASICs and custom circuits designed in the same process generation. The relevance of the challenge was amplified shortly thereafter by Andy Bechtolsheim, founder of Sun Microsystems and ubiquitous investor in the EDA industry. At a dinner talk at the 1999 International Symposium on Physical Design, Andy stated that the greatest near-term opportunity in CAD was to develop tools to bring the performance of ASIC circuits closer to that of custom designs. There seemed to be some synchronicity that two individuals so different in concern and character would be pre-occupied with the same problem. Intrigued by Earl and Andy’s comments, the game was afoot. Earl Killian and other veterans of microprocessor design were helpful with clues as to the sources of the performance discrepancy: layout, circuit design, clocking methodology, and dynamic logic. I soon realized that I needed help in tracking down clues. Only at a wonderful institution like the University of California at Berkeley could I so easily commandeer an ab- bodied graduate student like David Chinnery with a knowledge of architecture, circuits, computer-aided design and algorithms | ||
| 650 | 4 | |a Engineering | |
| 650 | 4 | |a Circuits and Systems | |
| 650 | 4 | |a Electrical Engineering | |
| 650 | 4 | |a Computer-Aided Engineering (CAD, CAE) and Design | |
| 650 | 4 | |a Engineering | |
| 650 | 4 | |a Computer-aided engineering | |
| 650 | 4 | |a Electrical engineering | |
| 650 | 4 | |a Electronic circuits | |
| 700 | 1 | |a Keutzer, Kurt |4 aut | |
| 776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |z 9781402071133 |
| 856 | 4 | 0 | |u https://doi.org/10.1007/b105287 |x Verlag |z URL des Erstveröffentlichers |3 Volltext |
| 912 | |a ZDB-2-ENG | ||
| 940 | 1 | |q ZDB-2-ENG_2000/2004 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-030538214 | ||
| 966 | e | |u https://doi.org/10.1007/b105287 |l FHI01 |p ZDB-2-ENG |q ZDB-2-ENG_2000/2004 |x Verlag |3 Volltext | |
| 966 | e | |u https://doi.org/10.1007/b105287 |l BTU01 |p ZDB-2-ENG |q ZDB-2-ENG_Archiv |x Verlag |3 Volltext | |
Datensatz im Suchindex
| _version_ | 1804178818590572544 |
|---|---|
| any_adam_object | |
| author | Chinnery, David Keutzer, Kurt |
| author_facet | Chinnery, David Keutzer, Kurt |
| author_role | aut aut |
| author_sort | Chinnery, David |
| author_variant | d c dc k k kk |
| building | Verbundindex |
| bvnumber | BV045148515 |
| collection | ZDB-2-ENG |
| ctrlnum | (ZDB-2-ENG)978-0-306-47823-9 (OCoLC)1050950092 (DE-599)BVBBV045148515 |
| dewey-full | 621.3815 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3815 |
| dewey-search | 621.3815 |
| dewey-sort | 3621.3815 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| doi_str_mv | 10.1007/b105287 |
| format | Electronic eBook |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>03234nmm a2200481zc 4500</leader><controlfield tag="001">BV045148515</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">180827s2002 |||| o||u| ||||||eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9780306478239</subfield><subfield code="9">978-0-306-47823-9</subfield></datafield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">10.1007/b105287</subfield><subfield code="2">doi</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(ZDB-2-ENG)978-0-306-47823-9</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)1050950092</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV045148515</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">aacr</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-573</subfield><subfield code="a">DE-634</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.3815</subfield><subfield code="2">23</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Chinnery, David</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Closing the Gap Between ASIC & Custom</subfield><subfield code="b">Tools and Techniques for High-Performance ASIC Design</subfield><subfield code="c">by David Chinnery, Kurt Keutzer</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boston, MA</subfield><subfield code="b">Springer US</subfield><subfield code="c">2002</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 Online-Ressource (XV, 414 p)</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">by Kurt Keutzer Those looking for a quick overview of the book should fast-forward to the Introduction in Chapter 1. What follows is a personal account of the creation of this book. The challenge from Earl Killian, formerly an architect of the MIPS processors and at that time Chief Architect at Tensilica, was to explain the significant performance gap between ASICs and custom circuits designed in the same process generation. The relevance of the challenge was amplified shortly thereafter by Andy Bechtolsheim, founder of Sun Microsystems and ubiquitous investor in the EDA industry. At a dinner talk at the 1999 International Symposium on Physical Design, Andy stated that the greatest near-term opportunity in CAD was to develop tools to bring the performance of ASIC circuits closer to that of custom designs. There seemed to be some synchronicity that two individuals so different in concern and character would be pre-occupied with the same problem. Intrigued by Earl and Andy’s comments, the game was afoot. Earl Killian and other veterans of microprocessor design were helpful with clues as to the sources of the performance discrepancy: layout, circuit design, clocking methodology, and dynamic logic. I soon realized that I needed help in tracking down clues. Only at a wonderful institution like the University of California at Berkeley could I so easily commandeer an ab- bodied graduate student like David Chinnery with a knowledge of architecture, circuits, computer-aided design and algorithms</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits and Systems</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electrical Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer-Aided Engineering (CAD, CAE) and Design</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer-aided engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electrical engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic circuits</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Keutzer, Kurt</subfield><subfield code="4">aut</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe</subfield><subfield code="z">9781402071133</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">https://doi.org/10.1007/b105287</subfield><subfield code="x">Verlag</subfield><subfield code="z">URL des Erstveröffentlichers</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-2-ENG</subfield></datafield><datafield tag="940" ind1="1" ind2=" "><subfield code="q">ZDB-2-ENG_2000/2004</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-030538214</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/b105287</subfield><subfield code="l">FHI01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="q">ZDB-2-ENG_2000/2004</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/b105287</subfield><subfield code="l">BTU01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="q">ZDB-2-ENG_Archiv</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield></record></collection> |
| id | DE-604.BV045148515 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-10T08:10:01Z |
| institution | BVB |
| isbn | 9780306478239 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030538214 |
| oclc_num | 1050950092 |
| open_access_boolean | |
| owner | DE-573 DE-634 |
| owner_facet | DE-573 DE-634 |
| physical | 1 Online-Ressource (XV, 414 p) |
| psigel | ZDB-2-ENG ZDB-2-ENG_2000/2004 ZDB-2-ENG ZDB-2-ENG_2000/2004 ZDB-2-ENG ZDB-2-ENG_Archiv |
| publishDate | 2002 |
| publishDateSearch | 2002 |
| publishDateSort | 2002 |
| publisher | Springer US |
| record_format | marc |
| spelling | Chinnery, David Verfasser aut Closing the Gap Between ASIC & Custom Tools and Techniques for High-Performance ASIC Design by David Chinnery, Kurt Keutzer Boston, MA Springer US 2002 1 Online-Ressource (XV, 414 p) txt rdacontent c rdamedia cr rdacarrier by Kurt Keutzer Those looking for a quick overview of the book should fast-forward to the Introduction in Chapter 1. What follows is a personal account of the creation of this book. The challenge from Earl Killian, formerly an architect of the MIPS processors and at that time Chief Architect at Tensilica, was to explain the significant performance gap between ASICs and custom circuits designed in the same process generation. The relevance of the challenge was amplified shortly thereafter by Andy Bechtolsheim, founder of Sun Microsystems and ubiquitous investor in the EDA industry. At a dinner talk at the 1999 International Symposium on Physical Design, Andy stated that the greatest near-term opportunity in CAD was to develop tools to bring the performance of ASIC circuits closer to that of custom designs. There seemed to be some synchronicity that two individuals so different in concern and character would be pre-occupied with the same problem. Intrigued by Earl and Andy’s comments, the game was afoot. Earl Killian and other veterans of microprocessor design were helpful with clues as to the sources of the performance discrepancy: layout, circuit design, clocking methodology, and dynamic logic. I soon realized that I needed help in tracking down clues. Only at a wonderful institution like the University of California at Berkeley could I so easily commandeer an ab- bodied graduate student like David Chinnery with a knowledge of architecture, circuits, computer-aided design and algorithms Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits Keutzer, Kurt aut Erscheint auch als Druck-Ausgabe 9781402071133 https://doi.org/10.1007/b105287 Verlag URL des Erstveröffentlichers Volltext |
| spellingShingle | Chinnery, David Keutzer, Kurt Closing the Gap Between ASIC & Custom Tools and Techniques for High-Performance ASIC Design Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits |
| title | Closing the Gap Between ASIC & Custom Tools and Techniques for High-Performance ASIC Design |
| title_auth | Closing the Gap Between ASIC & Custom Tools and Techniques for High-Performance ASIC Design |
| title_exact_search | Closing the Gap Between ASIC & Custom Tools and Techniques for High-Performance ASIC Design |
| title_full | Closing the Gap Between ASIC & Custom Tools and Techniques for High-Performance ASIC Design by David Chinnery, Kurt Keutzer |
| title_fullStr | Closing the Gap Between ASIC & Custom Tools and Techniques for High-Performance ASIC Design by David Chinnery, Kurt Keutzer |
| title_full_unstemmed | Closing the Gap Between ASIC & Custom Tools and Techniques for High-Performance ASIC Design by David Chinnery, Kurt Keutzer |
| title_short | Closing the Gap Between ASIC & Custom |
| title_sort | closing the gap between asic custom tools and techniques for high performance asic design |
| title_sub | Tools and Techniques for High-Performance ASIC Design |
| topic | Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits |
| topic_facet | Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits |
| url | https://doi.org/10.1007/b105287 |
| work_keys_str_mv | AT chinnerydavid closingthegapbetweenasiccustomtoolsandtechniquesforhighperformanceasicdesign AT keutzerkurt closingthegapbetweenasiccustomtoolsandtechniquesforhighperformanceasicdesign |