Advanced ASIC chip synthesis: using Synopsys Design Compiler, Physical Compiler, and PrimeTime
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Boston
Kluwer Academic Publishers
c2002
|
| Ausgabe: | 2nd ed |
| Schlagworte: | |
| Beschreibung: | xxiv, 328 p. |
| ISBN: | 0792376447 |
Internformat
MARC
| LEADER | 00000nmm a2200000zc 4500 | ||
|---|---|---|---|
| 001 | BV044830911 | ||
| 003 | DE-604 | ||
| 005 | 20180305 | ||
| 007 | cr|uuu---uuuuu | ||
| 008 | 180305s2002 |||| o||u| ||||||eng d | ||
| 020 | |a 0792376447 |9 0-7923-7644-7 | ||
| 035 | |a (ZDB-38-ESG)ebr10052694 | ||
| 035 | |a (OCoLC)51874139 | ||
| 035 | |a (DE-599)BVBBV044830911 | ||
| 040 | |a DE-604 |b ger |e aacr | ||
| 041 | 0 | |a eng | |
| 082 | 0 | |a 621.39/5 |2 21 | |
| 100 | 1 | |a Bhatnagar, Himanshu |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Advanced ASIC chip synthesis |b using Synopsys Design Compiler, Physical Compiler, and PrimeTime |c Himanshu Bhatnagar |
| 250 | |a 2nd ed | ||
| 264 | 1 | |a Boston |b Kluwer Academic Publishers |c c2002 | |
| 300 | |a xxiv, 328 p. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b c |2 rdamedia | ||
| 338 | |b cr |2 rdacarrier | ||
| 505 | 8 | |a Includes bibliographical references and index | |
| 650 | 4 | |a Application-specific integrated circuits |x Computer-aided design | |
| 650 | 4 | |a Logic design |x Data processing | |
| 650 | 4 | |a Compilers (Computer programs) | |
| 650 | 0 | 7 | |a Logischer Entwurf |0 (DE-588)4168051-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Chip |0 (DE-588)4197163-2 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Kundenspezifische Schaltung |0 (DE-588)4122250-7 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a Chip |0 (DE-588)4197163-2 |D s |
| 689 | 0 | 1 | |a Logischer Entwurf |0 (DE-588)4168051-0 |D s |
| 689 | 0 | 2 | |a Kundenspezifische Schaltung |0 (DE-588)4122250-7 |D s |
| 689 | 0 | |8 1\p |5 DE-604 | |
| 912 | |a ZDB-38-ESG | ||
| 999 | |a oai:aleph.bib-bvb.de:BVB01-030225776 | ||
| 883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
Datensatz im Suchindex
| _version_ | 1804178331929673728 |
|---|---|
| any_adam_object | |
| author | Bhatnagar, Himanshu |
| author_facet | Bhatnagar, Himanshu |
| author_role | aut |
| author_sort | Bhatnagar, Himanshu |
| author_variant | h b hb |
| building | Verbundindex |
| bvnumber | BV044830911 |
| collection | ZDB-38-ESG |
| contents | Includes bibliographical references and index |
| ctrlnum | (ZDB-38-ESG)ebr10052694 (OCoLC)51874139 (DE-599)BVBBV044830911 |
| dewey-full | 621.39/5 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/5 |
| dewey-search | 621.39/5 |
| dewey-sort | 3621.39 15 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| edition | 2nd ed |
| format | Electronic eBook |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01592nmm a2200433zc 4500</leader><controlfield tag="001">BV044830911</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20180305 </controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">180305s2002 |||| o||u| ||||||eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0792376447</subfield><subfield code="9">0-7923-7644-7</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(ZDB-38-ESG)ebr10052694</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)51874139</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV044830911</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">aacr</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.39/5</subfield><subfield code="2">21</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Bhatnagar, Himanshu</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Advanced ASIC chip synthesis</subfield><subfield code="b">using Synopsys Design Compiler, Physical Compiler, and PrimeTime</subfield><subfield code="c">Himanshu Bhatnagar</subfield></datafield><datafield tag="250" ind1=" " ind2=" "><subfield code="a">2nd ed</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boston</subfield><subfield code="b">Kluwer Academic Publishers</subfield><subfield code="c">c2002</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">xxiv, 328 p.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="505" ind1="8" ind2=" "><subfield code="a">Includes bibliographical references and index</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Application-specific integrated circuits</subfield><subfield code="x">Computer-aided design</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic design</subfield><subfield code="x">Data processing</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Compilers (Computer programs)</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Logischer Entwurf</subfield><subfield code="0">(DE-588)4168051-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Chip</subfield><subfield code="0">(DE-588)4197163-2</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Kundenspezifische Schaltung</subfield><subfield code="0">(DE-588)4122250-7</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Chip</subfield><subfield code="0">(DE-588)4197163-2</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Logischer Entwurf</subfield><subfield code="0">(DE-588)4168051-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="2"><subfield code="a">Kundenspezifische Schaltung</subfield><subfield code="0">(DE-588)4122250-7</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-38-ESG</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-030225776</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield></record></collection> |
| id | DE-604.BV044830911 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-10T08:02:17Z |
| institution | BVB |
| isbn | 0792376447 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030225776 |
| oclc_num | 51874139 |
| open_access_boolean | |
| physical | xxiv, 328 p. |
| psigel | ZDB-38-ESG |
| publishDate | 2002 |
| publishDateSearch | 2002 |
| publishDateSort | 2002 |
| publisher | Kluwer Academic Publishers |
| record_format | marc |
| spelling | Bhatnagar, Himanshu Verfasser aut Advanced ASIC chip synthesis using Synopsys Design Compiler, Physical Compiler, and PrimeTime Himanshu Bhatnagar 2nd ed Boston Kluwer Academic Publishers c2002 xxiv, 328 p. txt rdacontent c rdamedia cr rdacarrier Includes bibliographical references and index Application-specific integrated circuits Computer-aided design Logic design Data processing Compilers (Computer programs) Logischer Entwurf (DE-588)4168051-0 gnd rswk-swf Chip (DE-588)4197163-2 gnd rswk-swf Kundenspezifische Schaltung (DE-588)4122250-7 gnd rswk-swf Chip (DE-588)4197163-2 s Logischer Entwurf (DE-588)4168051-0 s Kundenspezifische Schaltung (DE-588)4122250-7 s 1\p DE-604 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Bhatnagar, Himanshu Advanced ASIC chip synthesis using Synopsys Design Compiler, Physical Compiler, and PrimeTime Includes bibliographical references and index Application-specific integrated circuits Computer-aided design Logic design Data processing Compilers (Computer programs) Logischer Entwurf (DE-588)4168051-0 gnd Chip (DE-588)4197163-2 gnd Kundenspezifische Schaltung (DE-588)4122250-7 gnd |
| subject_GND | (DE-588)4168051-0 (DE-588)4197163-2 (DE-588)4122250-7 |
| title | Advanced ASIC chip synthesis using Synopsys Design Compiler, Physical Compiler, and PrimeTime |
| title_auth | Advanced ASIC chip synthesis using Synopsys Design Compiler, Physical Compiler, and PrimeTime |
| title_exact_search | Advanced ASIC chip synthesis using Synopsys Design Compiler, Physical Compiler, and PrimeTime |
| title_full | Advanced ASIC chip synthesis using Synopsys Design Compiler, Physical Compiler, and PrimeTime Himanshu Bhatnagar |
| title_fullStr | Advanced ASIC chip synthesis using Synopsys Design Compiler, Physical Compiler, and PrimeTime Himanshu Bhatnagar |
| title_full_unstemmed | Advanced ASIC chip synthesis using Synopsys Design Compiler, Physical Compiler, and PrimeTime Himanshu Bhatnagar |
| title_short | Advanced ASIC chip synthesis |
| title_sort | advanced asic chip synthesis using synopsys design compiler physical compiler and primetime |
| title_sub | using Synopsys Design Compiler, Physical Compiler, and PrimeTime |
| topic | Application-specific integrated circuits Computer-aided design Logic design Data processing Compilers (Computer programs) Logischer Entwurf (DE-588)4168051-0 gnd Chip (DE-588)4197163-2 gnd Kundenspezifische Schaltung (DE-588)4122250-7 gnd |
| topic_facet | Application-specific integrated circuits Computer-aided design Logic design Data processing Compilers (Computer programs) Logischer Entwurf Chip Kundenspezifische Schaltung |
| work_keys_str_mv | AT bhatnagarhimanshu advancedasicchipsynthesisusingsynopsysdesigncompilerphysicalcompilerandprimetime |