Verilog Quickstart: a practical guide to simulation and synthesis in Verilog
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
Boston
Kluwer Academic Publishers
2002
|
Ausgabe: | 3rd ed |
Schriftenreihe: | Kluwer international series in engineering and computer science
SECS 667 |
Schlagworte: | |
Beschreibung: | Includes index |
Beschreibung: | xxii, 355 p. |
ISBN: | 0792376722 |
Internformat
MARC
LEADER | 00000nmm a2200000zcb4500 | ||
---|---|---|---|
001 | BV044830674 | ||
003 | DE-604 | ||
005 | 20180305 | ||
007 | cr|uuu---uuuuu | ||
008 | 180305s2002 |||| o||u| ||||||eng d | ||
020 | |a 0792376722 |9 0-7923-7672-2 | ||
035 | |a (ZDB-38-ESG)ebr10048350 | ||
035 | |a (OCoLC)52802125 | ||
035 | |a (DE-599)BVBBV044830674 | ||
040 | |a DE-604 |b ger |e aacr | ||
041 | 0 | |a eng | |
082 | 0 | |a 621.39/2 |2 21 | |
100 | 1 | |a Lee, James M. |d 1962- |e Verfasser |4 aut | |
245 | 1 | 0 | |a Verilog Quickstart |b a practical guide to simulation and synthesis in Verilog |c James M. Lee |
250 | |a 3rd ed | ||
264 | 1 | |a Boston |b Kluwer Academic Publishers |c 2002 | |
300 | |a xxii, 355 p. | ||
336 | |b txt |2 rdacontent | ||
337 | |b c |2 rdamedia | ||
338 | |b cr |2 rdacarrier | ||
490 | 0 | |a Kluwer international series in engineering and computer science |v SECS 667 | |
500 | |a Includes index | ||
650 | 4 | |a Verilog (Computer hardware description language) | |
650 | 0 | 7 | |a VERILOG |0 (DE-588)4268385-3 |2 gnd |9 rswk-swf |
689 | 0 | 0 | |a VERILOG |0 (DE-588)4268385-3 |D s |
689 | 0 | |8 1\p |5 DE-604 | |
912 | |a ZDB-38-ESG | ||
999 | |a oai:aleph.bib-bvb.de:BVB01-030225538 | ||
883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk |
Datensatz im Suchindex
_version_ | 1804178331486126080 |
---|---|
any_adam_object | |
author | Lee, James M. 1962- |
author_facet | Lee, James M. 1962- |
author_role | aut |
author_sort | Lee, James M. 1962- |
author_variant | j m l jm jml |
building | Verbundindex |
bvnumber | BV044830674 |
collection | ZDB-38-ESG |
ctrlnum | (ZDB-38-ESG)ebr10048350 (OCoLC)52802125 (DE-599)BVBBV044830674 |
dewey-full | 621.39/2 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.39/2 |
dewey-search | 621.39/2 |
dewey-sort | 3621.39 12 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
edition | 3rd ed |
format | Electronic eBook |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01258nmm a2200373zcb4500</leader><controlfield tag="001">BV044830674</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20180305 </controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">180305s2002 |||| o||u| ||||||eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0792376722</subfield><subfield code="9">0-7923-7672-2</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(ZDB-38-ESG)ebr10048350</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)52802125</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV044830674</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">aacr</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.39/2</subfield><subfield code="2">21</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Lee, James M.</subfield><subfield code="d">1962-</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Verilog Quickstart</subfield><subfield code="b">a practical guide to simulation and synthesis in Verilog</subfield><subfield code="c">James M. Lee</subfield></datafield><datafield tag="250" ind1=" " ind2=" "><subfield code="a">3rd ed</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boston</subfield><subfield code="b">Kluwer Academic Publishers</subfield><subfield code="c">2002</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">xxii, 355 p.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="0" ind2=" "><subfield code="a">Kluwer international series in engineering and computer science</subfield><subfield code="v">SECS 667</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Includes index</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Verilog (Computer hardware description language)</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VERILOG</subfield><subfield code="0">(DE-588)4268385-3</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">VERILOG</subfield><subfield code="0">(DE-588)4268385-3</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-38-ESG</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-030225538</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield></record></collection> |
id | DE-604.BV044830674 |
illustrated | Not Illustrated |
indexdate | 2024-07-10T08:02:16Z |
institution | BVB |
isbn | 0792376722 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030225538 |
oclc_num | 52802125 |
open_access_boolean | |
physical | xxii, 355 p. |
psigel | ZDB-38-ESG |
publishDate | 2002 |
publishDateSearch | 2002 |
publishDateSort | 2002 |
publisher | Kluwer Academic Publishers |
record_format | marc |
series2 | Kluwer international series in engineering and computer science |
spelling | Lee, James M. 1962- Verfasser aut Verilog Quickstart a practical guide to simulation and synthesis in Verilog James M. Lee 3rd ed Boston Kluwer Academic Publishers 2002 xxii, 355 p. txt rdacontent c rdamedia cr rdacarrier Kluwer international series in engineering and computer science SECS 667 Includes index Verilog (Computer hardware description language) VERILOG (DE-588)4268385-3 gnd rswk-swf VERILOG (DE-588)4268385-3 s 1\p DE-604 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
spellingShingle | Lee, James M. 1962- Verilog Quickstart a practical guide to simulation and synthesis in Verilog Verilog (Computer hardware description language) VERILOG (DE-588)4268385-3 gnd |
subject_GND | (DE-588)4268385-3 |
title | Verilog Quickstart a practical guide to simulation and synthesis in Verilog |
title_auth | Verilog Quickstart a practical guide to simulation and synthesis in Verilog |
title_exact_search | Verilog Quickstart a practical guide to simulation and synthesis in Verilog |
title_full | Verilog Quickstart a practical guide to simulation and synthesis in Verilog James M. Lee |
title_fullStr | Verilog Quickstart a practical guide to simulation and synthesis in Verilog James M. Lee |
title_full_unstemmed | Verilog Quickstart a practical guide to simulation and synthesis in Verilog James M. Lee |
title_short | Verilog Quickstart |
title_sort | verilog quickstart a practical guide to simulation and synthesis in verilog |
title_sub | a practical guide to simulation and synthesis in Verilog |
topic | Verilog (Computer hardware description language) VERILOG (DE-588)4268385-3 gnd |
topic_facet | Verilog (Computer hardware description language) VERILOG |
work_keys_str_mv | AT leejamesm verilogquickstartapracticalguidetosimulationandsynthesisinverilog |