System-On-A-Chip verification: methodology and techniques
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Boston, MA
Kluwer Academic Publishers
c2001
|
| Schlagworte: | |
| Beschreibung: | xiii, 372 p. |
| ISBN: | 0792372794 |
Internformat
MARC
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| 001 | BV044830644 | ||
| 003 | DE-604 | ||
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| 008 | 180305s2001 |||| o||u| ||||||eng d | ||
| 020 | |a 0792372794 |c alk. paper |9 0-7923-7279-4 | ||
| 035 | |a (ZDB-38-ESG)ebr10048276 | ||
| 035 | |a (OCoLC)55664069 | ||
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| 041 | 0 | |a eng | |
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| 100 | 1 | |a Rashinkar, Prakash |d 1960- |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a System-On-A-Chip verification |b methodology and techniques |c Prakash Rashinkar, Peter Paterson, Leena Singh |
| 264 | 1 | |a Boston, MA |b Kluwer Academic Publishers |c c2001 | |
| 300 | |a xiii, 372 p. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b c |2 rdamedia | ||
| 338 | |b cr |2 rdacarrier | ||
| 505 | 8 | |a Includes bibliographical references and index | |
| 650 | 4 | |a System design | |
| 650 | 4 | |a Electronic digital computers |x Design and construction | |
| 650 | 4 | |a Computer software |x Development | |
| 650 | 0 | 7 | |a Softwareentwicklung |0 (DE-588)4116522-6 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Hardwareverifikation |0 (DE-588)4214982-4 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a Softwareentwicklung |0 (DE-588)4116522-6 |D s |
| 689 | 0 | 1 | |a Hardwareverifikation |0 (DE-588)4214982-4 |D s |
| 689 | 0 | |8 1\p |5 DE-604 | |
| 700 | 1 | |a Paterson, Peter |d 1955- |e Sonstige |4 oth | |
| 700 | 1 | |a Singh, Leena |d 1971- |e Sonstige |4 oth | |
| 912 | |a ZDB-38-ESG | ||
| 999 | |a oai:aleph.bib-bvb.de:BVB01-030225507 | ||
| 883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
Datensatz im Suchindex
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|---|---|
| any_adam_object | |
| author | Rashinkar, Prakash 1960- |
| author_facet | Rashinkar, Prakash 1960- |
| author_role | aut |
| author_sort | Rashinkar, Prakash 1960- |
| author_variant | p r pr |
| building | Verbundindex |
| bvnumber | BV044830644 |
| collection | ZDB-38-ESG |
| contents | Includes bibliographical references and index |
| ctrlnum | (ZDB-38-ESG)ebr10048276 (OCoLC)55664069 (DE-599)BVBBV044830644 |
| dewey-full | 621.39/5 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/5 |
| dewey-search | 621.39/5 |
| dewey-sort | 3621.39 15 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Electronic eBook |
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| id | DE-604.BV044830644 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-10T08:02:16Z |
| institution | BVB |
| isbn | 0792372794 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030225507 |
| oclc_num | 55664069 |
| open_access_boolean | |
| physical | xiii, 372 p. |
| psigel | ZDB-38-ESG |
| publishDate | 2001 |
| publishDateSearch | 2001 |
| publishDateSort | 2001 |
| publisher | Kluwer Academic Publishers |
| record_format | marc |
| spelling | Rashinkar, Prakash 1960- Verfasser aut System-On-A-Chip verification methodology and techniques Prakash Rashinkar, Peter Paterson, Leena Singh Boston, MA Kluwer Academic Publishers c2001 xiii, 372 p. txt rdacontent c rdamedia cr rdacarrier Includes bibliographical references and index System design Electronic digital computers Design and construction Computer software Development Softwareentwicklung (DE-588)4116522-6 gnd rswk-swf Hardwareverifikation (DE-588)4214982-4 gnd rswk-swf Softwareentwicklung (DE-588)4116522-6 s Hardwareverifikation (DE-588)4214982-4 s 1\p DE-604 Paterson, Peter 1955- Sonstige oth Singh, Leena 1971- Sonstige oth 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Rashinkar, Prakash 1960- System-On-A-Chip verification methodology and techniques Includes bibliographical references and index System design Electronic digital computers Design and construction Computer software Development Softwareentwicklung (DE-588)4116522-6 gnd Hardwareverifikation (DE-588)4214982-4 gnd |
| subject_GND | (DE-588)4116522-6 (DE-588)4214982-4 |
| title | System-On-A-Chip verification methodology and techniques |
| title_auth | System-On-A-Chip verification methodology and techniques |
| title_exact_search | System-On-A-Chip verification methodology and techniques |
| title_full | System-On-A-Chip verification methodology and techniques Prakash Rashinkar, Peter Paterson, Leena Singh |
| title_fullStr | System-On-A-Chip verification methodology and techniques Prakash Rashinkar, Peter Paterson, Leena Singh |
| title_full_unstemmed | System-On-A-Chip verification methodology and techniques Prakash Rashinkar, Peter Paterson, Leena Singh |
| title_short | System-On-A-Chip verification |
| title_sort | system on a chip verification methodology and techniques |
| title_sub | methodology and techniques |
| topic | System design Electronic digital computers Design and construction Computer software Development Softwareentwicklung (DE-588)4116522-6 gnd Hardwareverifikation (DE-588)4214982-4 gnd |
| topic_facet | System design Electronic digital computers Design and construction Computer software Development Softwareentwicklung Hardwareverifikation |
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