SiP System-in-Package design and simulation: mentor EE flow advanced design guide
An advanced reference documenting, in detail, every step of a real System-in-Package (SiP) design flow Written by an engineer at the leading edge of SiP design and implementation, this book demonstrates how to design SiPs using Mentor EE Flow. Key topics covered include wire bonding, die stacks, cav...
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Singapore
Publishing House of Electronics Industry/Wiley
2017
|
| Schlagworte: | |
| Online-Zugang: | FRO01 TUM01 UBG01 UER01 Volltext |
| Zusammenfassung: | An advanced reference documenting, in detail, every step of a real System-in-Package (SiP) design flow Written by an engineer at the leading edge of SiP design and implementation, this book demonstrates how to design SiPs using Mentor EE Flow. Key topics covered include wire bonding, die stacks, cavity, flip chip and RDL (redistribution layer), Embedded Passive, RF design, concurrent design, Xtreme design, 3D real-time DRC (design rule checking), and SiP manufacture. Extensively illustrated throughout, System in Package Design and Simulation covers an array of issues of vital concern for SiP design and fabrication electronics engineers, as well as SiP users, including: -Cavity and sacked dies design -FlipChip and RDL design -Routing and coppering -3D Real-Time DRC check -SiP simulation technology -Mentor SiP Design and Simulation Platform Designed to function equally well as a reference, tutorial, and self-study, System in Package Design and Simulation is an indispensable working resource for every SiP designer, especially those who use Mentor design tools |
| Beschreibung: | Includes bibliographical references and index SiP design and simulation platform -- Basic knowledge of package -- SiP production process -- New package technologies -- SiP design and simulation flow -- Central library -- Schematic input -- Multi-board project management and schematic concurrent design -- Layout creation and setting -- Constraint rules management -- Wire bond design -- Cavity and chip stack design -- FlipChip and RDL design -- Route and plane -- Embedded passives design -- RF circuit design -- Layout concurrent design -- 3D real-time DRC -- Design review -- Manufacture data output -- SiP simulation technology |
| Beschreibung: | 1 Online-Ressource (xvii, 477, 8 Seiten) |
| ISBN: | 9781119045991 9781119046011 9781119046004 |
Internformat
MARC
| LEADER | 00000nmm a2200000zc 4500 | ||
|---|---|---|---|
| 001 | BV044621607 | ||
| 003 | DE-604 | ||
| 005 | 20190201 | ||
| 007 | cr|uuu---uuuuu | ||
| 008 | 171110s2017 |||| o||u| ||||||eng d | ||
| 020 | |a 9781119045991 |c Online |9 978-1-119-04599-1 | ||
| 020 | |a 9781119046011 |c Online, PDF |9 978-1-119-04601-1 | ||
| 020 | |a 9781119046004 |c Online, EPUB |9 978-1-119-04600-4 | ||
| 024 | 7 | |a 10.1002/9781119045991 |2 doi | |
| 035 | |a (ZDB-30-PQE)EBC4915580 | ||
| 035 | |a (ZDB-89-EBL)EBL4915580 | ||
| 035 | |a (ZDB-38-EBR)ebr11412608 | ||
| 035 | |a (OCoLC)1011418398 | ||
| 035 | |a (DE-599)BVBBV044621607 | ||
| 040 | |a DE-604 |b ger |e rda | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-861 |a DE-29 |a DE-91 |a DE-83 | ||
| 082 | 0 | |a 621.3815 | |
| 084 | |a ZN 4192 |0 (DE-625)157372: |2 rvk | ||
| 100 | 1 | |a Li, Suny |d 1974- |e Verfasser |0 (DE-588)1142391205 |4 aut | |
| 245 | 1 | 0 | |a SiP System-in-Package design and simulation |b mentor EE flow advanced design guide |c Suny Li (Li Yang), SiP/PCB Technical Specialist, Beijing, China |
| 264 | 1 | |a Singapore |b Publishing House of Electronics Industry/Wiley |c 2017 | |
| 300 | |a 1 Online-Ressource (xvii, 477, 8 Seiten) | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b c |2 rdamedia | ||
| 338 | |b cr |2 rdacarrier | ||
| 500 | |a Includes bibliographical references and index | ||
| 500 | |a SiP design and simulation platform -- Basic knowledge of package -- SiP production process -- New package technologies -- SiP design and simulation flow -- Central library -- Schematic input -- Multi-board project management and schematic concurrent design -- Layout creation and setting -- Constraint rules management -- Wire bond design -- Cavity and chip stack design -- FlipChip and RDL design -- Route and plane -- Embedded passives design -- RF circuit design -- Layout concurrent design -- 3D real-time DRC -- Design review -- Manufacture data output -- SiP simulation technology | ||
| 520 | |a An advanced reference documenting, in detail, every step of a real System-in-Package (SiP) design flow Written by an engineer at the leading edge of SiP design and implementation, this book demonstrates how to design SiPs using Mentor EE Flow. Key topics covered include wire bonding, die stacks, cavity, flip chip and RDL (redistribution layer), Embedded Passive, RF design, concurrent design, Xtreme design, 3D real-time DRC (design rule checking), and SiP manufacture. Extensively illustrated throughout, System in Package Design and Simulation covers an array of issues of vital concern for SiP design and fabrication electronics engineers, as well as SiP users, including: -Cavity and sacked dies design -FlipChip and RDL design -Routing and coppering -3D Real-Time DRC check -SiP simulation technology -Mentor SiP Design and Simulation Platform Designed to function equally well as a reference, tutorial, and self-study, System in Package Design and Simulation is an indispensable working resource for every SiP designer, especially those who use Mentor design tools | ||
| 650 | 4 | |a Integrated circuits / Design and construction | |
| 650 | 4 | |a Multichip modules (Microelectronics) / Design and construction | |
| 650 | 4 | |a TECHNOLOGY & ENGINEERING / Mechanical / bisacsh | |
| 650 | 4 | |a Integrated circuits / Design and construction | |
| 650 | 4 | |a Multichip modules (Microelectronics) / Design and construction | |
| 650 | 0 | 7 | |a System-in-Package |0 (DE-588)7520794-1 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Elektronische Baugruppe |0 (DE-588)4014350-8 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a Elektronische Baugruppe |0 (DE-588)4014350-8 |D s |
| 689 | 0 | 1 | |a System-in-Package |0 (DE-588)7520794-1 |D s |
| 689 | 0 | |5 DE-604 | |
| 776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe, Hardcover |z 978-1-119-04593-9 |
| 856 | 4 | 0 | |u https://onlinelibrary.wiley.com/doi/book/10.1002/9781119045991 |x Verlag |z URL des Erstveröffentlichers |3 Volltext |
| 912 | |a ebook |a ZDB-30-PQE |a ZDB-35-WIC | ||
| 940 | 1 | |q UBG_PDA_WIC | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-030019873 | ||
| 966 | e | |u https://onlinelibrary.wiley.com/doi/book/10.1002/9781119045991 |l FRO01 |p ZDB-35-WIC |q FRO_PDA_WIC |x Verlag |3 Volltext | |
| 966 | e | |u https://ebookcentral.proquest.com/lib/munchentech/detail.action?docID=4915580 |l TUM01 |p ZDB-30-PQE |q TUM_PDA_PQE_Kauf |x Aggregator |3 Volltext | |
| 966 | e | |u https://onlinelibrary.wiley.com/doi/book/10.1002/9781119045991 |l UBG01 |p ZDB-35-WIC |q UBG_PDA_WIC |x Verlag |3 Volltext | |
| 966 | e | |u https://onlinelibrary.wiley.com/doi/book/10.1002/9781119045991 |l UER01 |p ZDB-35-WIC |q UER_PDA_WIC_Kauf |x Verlag |3 Volltext | |
Datensatz im Suchindex
| _version_ | 1804178023383040000 |
|---|---|
| any_adam_object | |
| author | Li, Suny 1974- |
| author_GND | (DE-588)1142391205 |
| author_facet | Li, Suny 1974- |
| author_role | aut |
| author_sort | Li, Suny 1974- |
| author_variant | s l sl |
| building | Verbundindex |
| bvnumber | BV044621607 |
| classification_rvk | ZN 4192 |
| collection | ebook ZDB-30-PQE ZDB-35-WIC |
| ctrlnum | (ZDB-30-PQE)EBC4915580 (ZDB-89-EBL)EBL4915580 (ZDB-38-EBR)ebr11412608 (OCoLC)1011418398 (DE-599)BVBBV044621607 |
| dewey-full | 621.3815 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3815 |
| dewey-search | 621.3815 |
| dewey-sort | 3621.3815 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Electronic eBook |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>04484nmm a2200601zc 4500</leader><controlfield tag="001">BV044621607</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20190201 </controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">171110s2017 |||| o||u| ||||||eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781119045991</subfield><subfield code="c">Online</subfield><subfield code="9">978-1-119-04599-1</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781119046011</subfield><subfield code="c">Online, PDF</subfield><subfield code="9">978-1-119-04601-1</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781119046004</subfield><subfield code="c">Online, EPUB</subfield><subfield code="9">978-1-119-04600-4</subfield></datafield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">10.1002/9781119045991</subfield><subfield code="2">doi</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(ZDB-30-PQE)EBC4915580</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(ZDB-89-EBL)EBL4915580</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(ZDB-38-EBR)ebr11412608</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)1011418398</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV044621607</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rda</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-861</subfield><subfield code="a">DE-29</subfield><subfield code="a">DE-91</subfield><subfield code="a">DE-83</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.3815</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 4192</subfield><subfield code="0">(DE-625)157372:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Li, Suny</subfield><subfield code="d">1974-</subfield><subfield code="e">Verfasser</subfield><subfield code="0">(DE-588)1142391205</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">SiP System-in-Package design and simulation</subfield><subfield code="b">mentor EE flow advanced design guide</subfield><subfield code="c">Suny Li (Li Yang), SiP/PCB Technical Specialist, Beijing, China</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Singapore</subfield><subfield code="b">Publishing House of Electronics Industry/Wiley</subfield><subfield code="c">2017</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 Online-Ressource (xvii, 477, 8 Seiten)</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Includes bibliographical references and index</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">SiP design and simulation platform -- Basic knowledge of package -- SiP production process -- New package technologies -- SiP design and simulation flow -- Central library -- Schematic input -- Multi-board project management and schematic concurrent design -- Layout creation and setting -- Constraint rules management -- Wire bond design -- Cavity and chip stack design -- FlipChip and RDL design -- Route and plane -- Embedded passives design -- RF circuit design -- Layout concurrent design -- 3D real-time DRC -- Design review -- Manufacture data output -- SiP simulation technology</subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">An advanced reference documenting, in detail, every step of a real System-in-Package (SiP) design flow Written by an engineer at the leading edge of SiP design and implementation, this book demonstrates how to design SiPs using Mentor EE Flow. Key topics covered include wire bonding, die stacks, cavity, flip chip and RDL (redistribution layer), Embedded Passive, RF design, concurrent design, Xtreme design, 3D real-time DRC (design rule checking), and SiP manufacture. Extensively illustrated throughout, System in Package Design and Simulation covers an array of issues of vital concern for SiP design and fabrication electronics engineers, as well as SiP users, including: -Cavity and sacked dies design -FlipChip and RDL design -Routing and coppering -3D Real-Time DRC check -SiP simulation technology -Mentor SiP Design and Simulation Platform Designed to function equally well as a reference, tutorial, and self-study, System in Package Design and Simulation is an indispensable working resource for every SiP designer, especially those who use Mentor design tools</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Integrated circuits / Design and construction</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Multichip modules (Microelectronics) / Design and construction</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">TECHNOLOGY & ENGINEERING / Mechanical / bisacsh</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Integrated circuits / Design and construction</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Multichip modules (Microelectronics) / Design and construction</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">System-in-Package</subfield><subfield code="0">(DE-588)7520794-1</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Elektronische Baugruppe</subfield><subfield code="0">(DE-588)4014350-8</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Elektronische Baugruppe</subfield><subfield code="0">(DE-588)4014350-8</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">System-in-Package</subfield><subfield code="0">(DE-588)7520794-1</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe, Hardcover</subfield><subfield code="z">978-1-119-04593-9</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">https://onlinelibrary.wiley.com/doi/book/10.1002/9781119045991</subfield><subfield code="x">Verlag</subfield><subfield code="z">URL des Erstveröffentlichers</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ebook</subfield><subfield code="a">ZDB-30-PQE</subfield><subfield code="a">ZDB-35-WIC</subfield></datafield><datafield tag="940" ind1="1" ind2=" "><subfield code="q">UBG_PDA_WIC</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-030019873</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://onlinelibrary.wiley.com/doi/book/10.1002/9781119045991</subfield><subfield code="l">FRO01</subfield><subfield code="p">ZDB-35-WIC</subfield><subfield code="q">FRO_PDA_WIC</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://ebookcentral.proquest.com/lib/munchentech/detail.action?docID=4915580</subfield><subfield code="l">TUM01</subfield><subfield code="p">ZDB-30-PQE</subfield><subfield code="q">TUM_PDA_PQE_Kauf</subfield><subfield code="x">Aggregator</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://onlinelibrary.wiley.com/doi/book/10.1002/9781119045991</subfield><subfield code="l">UBG01</subfield><subfield code="p">ZDB-35-WIC</subfield><subfield code="q">UBG_PDA_WIC</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://onlinelibrary.wiley.com/doi/book/10.1002/9781119045991</subfield><subfield code="l">UER01</subfield><subfield code="p">ZDB-35-WIC</subfield><subfield code="q">UER_PDA_WIC_Kauf</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield></record></collection> |
| id | DE-604.BV044621607 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-10T07:57:23Z |
| institution | BVB |
| isbn | 9781119045991 9781119046011 9781119046004 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030019873 |
| oclc_num | 1011418398 |
| open_access_boolean | |
| owner | DE-861 DE-29 DE-91 DE-BY-TUM DE-83 |
| owner_facet | DE-861 DE-29 DE-91 DE-BY-TUM DE-83 |
| physical | 1 Online-Ressource (xvii, 477, 8 Seiten) |
| psigel | ebook ZDB-30-PQE ZDB-35-WIC UBG_PDA_WIC ZDB-35-WIC FRO_PDA_WIC ZDB-30-PQE TUM_PDA_PQE_Kauf ZDB-35-WIC UBG_PDA_WIC ZDB-35-WIC UER_PDA_WIC_Kauf |
| publishDate | 2017 |
| publishDateSearch | 2017 |
| publishDateSort | 2017 |
| publisher | Publishing House of Electronics Industry/Wiley |
| record_format | marc |
| spelling | Li, Suny 1974- Verfasser (DE-588)1142391205 aut SiP System-in-Package design and simulation mentor EE flow advanced design guide Suny Li (Li Yang), SiP/PCB Technical Specialist, Beijing, China Singapore Publishing House of Electronics Industry/Wiley 2017 1 Online-Ressource (xvii, 477, 8 Seiten) txt rdacontent c rdamedia cr rdacarrier Includes bibliographical references and index SiP design and simulation platform -- Basic knowledge of package -- SiP production process -- New package technologies -- SiP design and simulation flow -- Central library -- Schematic input -- Multi-board project management and schematic concurrent design -- Layout creation and setting -- Constraint rules management -- Wire bond design -- Cavity and chip stack design -- FlipChip and RDL design -- Route and plane -- Embedded passives design -- RF circuit design -- Layout concurrent design -- 3D real-time DRC -- Design review -- Manufacture data output -- SiP simulation technology An advanced reference documenting, in detail, every step of a real System-in-Package (SiP) design flow Written by an engineer at the leading edge of SiP design and implementation, this book demonstrates how to design SiPs using Mentor EE Flow. Key topics covered include wire bonding, die stacks, cavity, flip chip and RDL (redistribution layer), Embedded Passive, RF design, concurrent design, Xtreme design, 3D real-time DRC (design rule checking), and SiP manufacture. Extensively illustrated throughout, System in Package Design and Simulation covers an array of issues of vital concern for SiP design and fabrication electronics engineers, as well as SiP users, including: -Cavity and sacked dies design -FlipChip and RDL design -Routing and coppering -3D Real-Time DRC check -SiP simulation technology -Mentor SiP Design and Simulation Platform Designed to function equally well as a reference, tutorial, and self-study, System in Package Design and Simulation is an indispensable working resource for every SiP designer, especially those who use Mentor design tools Integrated circuits / Design and construction Multichip modules (Microelectronics) / Design and construction TECHNOLOGY & ENGINEERING / Mechanical / bisacsh System-in-Package (DE-588)7520794-1 gnd rswk-swf Elektronische Baugruppe (DE-588)4014350-8 gnd rswk-swf Elektronische Baugruppe (DE-588)4014350-8 s System-in-Package (DE-588)7520794-1 s DE-604 Erscheint auch als Druck-Ausgabe, Hardcover 978-1-119-04593-9 https://onlinelibrary.wiley.com/doi/book/10.1002/9781119045991 Verlag URL des Erstveröffentlichers Volltext |
| spellingShingle | Li, Suny 1974- SiP System-in-Package design and simulation mentor EE flow advanced design guide Integrated circuits / Design and construction Multichip modules (Microelectronics) / Design and construction TECHNOLOGY & ENGINEERING / Mechanical / bisacsh System-in-Package (DE-588)7520794-1 gnd Elektronische Baugruppe (DE-588)4014350-8 gnd |
| subject_GND | (DE-588)7520794-1 (DE-588)4014350-8 |
| title | SiP System-in-Package design and simulation mentor EE flow advanced design guide |
| title_auth | SiP System-in-Package design and simulation mentor EE flow advanced design guide |
| title_exact_search | SiP System-in-Package design and simulation mentor EE flow advanced design guide |
| title_full | SiP System-in-Package design and simulation mentor EE flow advanced design guide Suny Li (Li Yang), SiP/PCB Technical Specialist, Beijing, China |
| title_fullStr | SiP System-in-Package design and simulation mentor EE flow advanced design guide Suny Li (Li Yang), SiP/PCB Technical Specialist, Beijing, China |
| title_full_unstemmed | SiP System-in-Package design and simulation mentor EE flow advanced design guide Suny Li (Li Yang), SiP/PCB Technical Specialist, Beijing, China |
| title_short | SiP System-in-Package design and simulation |
| title_sort | sip system in package design and simulation mentor ee flow advanced design guide |
| title_sub | mentor EE flow advanced design guide |
| topic | Integrated circuits / Design and construction Multichip modules (Microelectronics) / Design and construction TECHNOLOGY & ENGINEERING / Mechanical / bisacsh System-in-Package (DE-588)7520794-1 gnd Elektronische Baugruppe (DE-588)4014350-8 gnd |
| topic_facet | Integrated circuits / Design and construction Multichip modules (Microelectronics) / Design and construction TECHNOLOGY & ENGINEERING / Mechanical / bisacsh System-in-Package Elektronische Baugruppe |
| url | https://onlinelibrary.wiley.com/doi/book/10.1002/9781119045991 |
| work_keys_str_mv | AT lisuny sipsysteminpackagedesignandsimulationmentoreeflowadvanceddesignguide |