System level ESD co-design:
"Demystifies the concept of system-level ESD and details its difference from the conventional component level ESD design and testing. Describes the protection elements and designs and focuses on the "co-design", an optimization methodology to address both issues in the same design spa...
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
Hoboken
John Wiley and Sons, Inc.
[2015]
|
Schlagworte: | |
Online-Zugang: | FRO01 UBG01 FHI01 FHN01 Volltext |
Zusammenfassung: | "Demystifies the concept of system-level ESD and details its difference from the conventional component level ESD design and testing. Describes the protection elements and designs and focuses on the "co-design", an optimization methodology to address both issues in the same design space"-- |
Beschreibung: | Includes bibliographical references and index. - Machine generated contents note: Chapter 1 Introduction Charvaka Duvvury Chapter 2 Component Versus System Level ESD Charvaka Duvvury and Harald Gossner Chapter 3 System Level Testing for ESD Susceptibility Michael Hopkins Chapter 4 PCB/IC Co-Design Concepts for SEED Harald Gossner and Charvaka Duvvury Chapter 5 Hard Fails & PCB Protection Devices Robert Ashton Chapter 6 Soft Fail and PCB design measures David Pommerenke and Pratik Maheshwari Chapter 7 ESD in Mobile Devices Matti Uusimaki Chapter 8 ESD for Automotive Applications Wolfgang Reinprecht Chapter 9 Futire Applications of SEED Methodology Harald Gossner and Charvaka Duvvury Chapter 10 Co-Design Tradeoffs: Balancing Robustness, Performance and Cost Jeffery C. Dunnihoo Index |
Beschreibung: | 1 online resource |
ISBN: | 9781118861899 1118861892 9781118861844 1118861841 9781118861905 |
Internformat
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500 | |a Includes bibliographical references and index. - Machine generated contents note: Chapter 1 Introduction Charvaka Duvvury Chapter 2 Component Versus System Level ESD Charvaka Duvvury and Harald Gossner Chapter 3 System Level Testing for ESD Susceptibility Michael Hopkins Chapter 4 PCB/IC Co-Design Concepts for SEED Harald Gossner and Charvaka Duvvury Chapter 5 Hard Fails & PCB Protection Devices Robert Ashton Chapter 6 Soft Fail and PCB design measures David Pommerenke and Pratik Maheshwari Chapter 7 ESD in Mobile Devices Matti Uusimaki Chapter 8 ESD for Automotive Applications Wolfgang Reinprecht Chapter 9 Futire Applications of SEED Methodology Harald Gossner and Charvaka Duvvury Chapter 10 Co-Design Tradeoffs: Balancing Robustness, Performance and Cost Jeffery C. Dunnihoo Index | ||
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Datensatz im Suchindex
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---|---|
any_adam_object | |
author | Duvvury, Charvaka |
author_facet | Duvvury, Charvaka |
author_role | aut |
author_sort | Duvvury, Charvaka |
author_variant | c d cd |
building | Verbundindex |
bvnumber | BV044327219 |
collection | ZDB-35-WIC ZDB-35-WEL |
ctrlnum | (OCoLC)992527505 (DE-599)BVBBV044327219 |
dewey-full | 537/.2 |
dewey-hundreds | 500 - Natural sciences and mathematics |
dewey-ones | 537 - Electricity and electronics |
dewey-raw | 537/.2 |
dewey-search | 537/.2 |
dewey-sort | 3537 12 |
dewey-tens | 530 - Physics |
discipline | Physik |
format | Electronic eBook |
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id | DE-604.BV044327219 |
illustrated | Not Illustrated |
indexdate | 2024-07-10T07:49:51Z |
institution | BVB |
isbn | 9781118861899 1118861892 9781118861844 1118861841 9781118861905 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-029730564 |
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publishDate | 2015 |
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publisher | John Wiley and Sons, Inc. |
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spelling | Duvvury, Charvaka Verfasser aut System level ESD co-design Charvaka Duvvury, Independent ESD Industry Consultant, Texas, USA, Harald Gossner, Intel, Germany Hoboken John Wiley and Sons, Inc. [2015] 1 online resource txt rdacontent c rdamedia cr rdacarrier Includes bibliographical references and index. - Machine generated contents note: Chapter 1 Introduction Charvaka Duvvury Chapter 2 Component Versus System Level ESD Charvaka Duvvury and Harald Gossner Chapter 3 System Level Testing for ESD Susceptibility Michael Hopkins Chapter 4 PCB/IC Co-Design Concepts for SEED Harald Gossner and Charvaka Duvvury Chapter 5 Hard Fails & PCB Protection Devices Robert Ashton Chapter 6 Soft Fail and PCB design measures David Pommerenke and Pratik Maheshwari Chapter 7 ESD in Mobile Devices Matti Uusimaki Chapter 8 ESD for Automotive Applications Wolfgang Reinprecht Chapter 9 Futire Applications of SEED Methodology Harald Gossner and Charvaka Duvvury Chapter 10 Co-Design Tradeoffs: Balancing Robustness, Performance and Cost Jeffery C. Dunnihoo Index "Demystifies the concept of system-level ESD and details its difference from the conventional component level ESD design and testing. Describes the protection elements and designs and focuses on the "co-design", an optimization methodology to address both issues in the same design space"-- TECHNOLOGY & ENGINEERING / Power Resources / General bisacsh Electronic apparatus and appliances / Design and construction fast Electrostatics fast Integrated circuits / Design and construction fast Integrated circuits / Protection fast Shielding (Electricity) fast Static eliminators fast SCIENCE / Physics / Electricity bisacsh SCIENCE / Physics / Electromagnetism bisacsh Shielding (Electricity) Electronic apparatus and appliances / Design and construction Integrated circuits / Design and construction Integrated circuits / Protection Electrostatics Static eliminators Integrierte Schaltung (DE-588)4027242-4 gnd rswk-swf Chip (DE-588)4197163-2 gnd rswk-swf Elektrostatik (DE-588)4151975-9 gnd rswk-swf Design (DE-588)4011510-0 gnd rswk-swf Integrierte Schaltung (DE-588)4027242-4 s Design (DE-588)4011510-0 s Chip (DE-588)4197163-2 s Elektrostatik (DE-588)4151975-9 s 1\p DE-604 Gossner, Harald Sonstige oth https://onlinelibrary.wiley.com/doi/book/10.1002/9781118861899 Verlag URL des Erstveröffentlichers Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
spellingShingle | Duvvury, Charvaka System level ESD co-design TECHNOLOGY & ENGINEERING / Power Resources / General bisacsh Electronic apparatus and appliances / Design and construction fast Electrostatics fast Integrated circuits / Design and construction fast Integrated circuits / Protection fast Shielding (Electricity) fast Static eliminators fast SCIENCE / Physics / Electricity bisacsh SCIENCE / Physics / Electromagnetism bisacsh Shielding (Electricity) Electronic apparatus and appliances / Design and construction Integrated circuits / Design and construction Integrated circuits / Protection Electrostatics Static eliminators Integrierte Schaltung (DE-588)4027242-4 gnd Chip (DE-588)4197163-2 gnd Elektrostatik (DE-588)4151975-9 gnd Design (DE-588)4011510-0 gnd |
subject_GND | (DE-588)4027242-4 (DE-588)4197163-2 (DE-588)4151975-9 (DE-588)4011510-0 |
title | System level ESD co-design |
title_auth | System level ESD co-design |
title_exact_search | System level ESD co-design |
title_full | System level ESD co-design Charvaka Duvvury, Independent ESD Industry Consultant, Texas, USA, Harald Gossner, Intel, Germany |
title_fullStr | System level ESD co-design Charvaka Duvvury, Independent ESD Industry Consultant, Texas, USA, Harald Gossner, Intel, Germany |
title_full_unstemmed | System level ESD co-design Charvaka Duvvury, Independent ESD Industry Consultant, Texas, USA, Harald Gossner, Intel, Germany |
title_short | System level ESD co-design |
title_sort | system level esd co design |
topic | TECHNOLOGY & ENGINEERING / Power Resources / General bisacsh Electronic apparatus and appliances / Design and construction fast Electrostatics fast Integrated circuits / Design and construction fast Integrated circuits / Protection fast Shielding (Electricity) fast Static eliminators fast SCIENCE / Physics / Electricity bisacsh SCIENCE / Physics / Electromagnetism bisacsh Shielding (Electricity) Electronic apparatus and appliances / Design and construction Integrated circuits / Design and construction Integrated circuits / Protection Electrostatics Static eliminators Integrierte Schaltung (DE-588)4027242-4 gnd Chip (DE-588)4197163-2 gnd Elektrostatik (DE-588)4151975-9 gnd Design (DE-588)4011510-0 gnd |
topic_facet | TECHNOLOGY & ENGINEERING / Power Resources / General Electronic apparatus and appliances / Design and construction Electrostatics Integrated circuits / Design and construction Integrated circuits / Protection Shielding (Electricity) Static eliminators SCIENCE / Physics / Electricity SCIENCE / Physics / Electromagnetism Integrierte Schaltung Chip Elektrostatik Design |
url | https://onlinelibrary.wiley.com/doi/book/10.1002/9781118861899 |
work_keys_str_mv | AT duvvurycharvaka systemlevelesdcodesign AT gossnerharald systemlevelesdcodesign |