Computer architecture:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
London
ISTE
2013
|
| Schlagworte: | |
| Beschreibung: | Includes bibliographical references and index |
| Beschreibung: | xiv, 364 p. |
| ISBN: | 9781848214293 9781118577790 |
Internformat
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| 100 | 1 | |a Blanchet, Gerard |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Computer architecture |c Gérard Blanchet, Bertrand Dupouy |
| 264 | 1 | |a London |b ISTE |c 2013 | |
| 300 | |a xiv, 364 p. | ||
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| 500 | |a Includes bibliographical references and index | ||
| 505 | 0 | |a pt. 1. Elements of a basic architecture -- pt. 2. Programming model and operation -- pt. 3. Memory hierarchy -- pt. 4. Parallelism and performance enhancement -- pt. 5. Appendices | |
| 650 | 4 | |a Computer architecture | |
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Datensatz im Suchindex
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| author | Blanchet, Gerard |
| author_facet | Blanchet, Gerard |
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| building | Verbundindex |
| bvnumber | BV044172527 |
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| contents | pt. 1. Elements of a basic architecture -- pt. 2. Programming model and operation -- pt. 3. Memory hierarchy -- pt. 4. Parallelism and performance enhancement -- pt. 5. Appendices |
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| dewey-ones | 004 - Computer science |
| dewey-raw | 004.22 |
| dewey-search | 004.22 |
| dewey-sort | 14.22 |
| dewey-tens | 000 - Computer science, information, general works |
| discipline | Informatik |
| format | Electronic eBook |
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| illustrated | Not Illustrated |
| indexdate | 2024-07-10T07:45:45Z |
| institution | BVB |
| isbn | 9781848214293 9781118577790 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-029579372 |
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| physical | xiv, 364 p. |
| psigel | ZDB-30-PAD |
| publishDate | 2013 |
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| publishDateSort | 2013 |
| publisher | ISTE |
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| spelling | Blanchet, Gerard Verfasser aut Computer architecture Gérard Blanchet, Bertrand Dupouy London ISTE 2013 xiv, 364 p. txt rdacontent c rdamedia cr rdacarrier Includes bibliographical references and index pt. 1. Elements of a basic architecture -- pt. 2. Programming model and operation -- pt. 3. Memory hierarchy -- pt. 4. Parallelism and performance enhancement -- pt. 5. Appendices Computer architecture Computerarchitektur (DE-588)4048717-9 gnd rswk-swf Computerarchitektur (DE-588)4048717-9 s 1\p DE-604 Dupouy, Bertrand Sonstige oth 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Blanchet, Gerard Computer architecture pt. 1. Elements of a basic architecture -- pt. 2. Programming model and operation -- pt. 3. Memory hierarchy -- pt. 4. Parallelism and performance enhancement -- pt. 5. Appendices Computer architecture Computerarchitektur (DE-588)4048717-9 gnd |
| subject_GND | (DE-588)4048717-9 |
| title | Computer architecture |
| title_auth | Computer architecture |
| title_exact_search | Computer architecture |
| title_full | Computer architecture Gérard Blanchet, Bertrand Dupouy |
| title_fullStr | Computer architecture Gérard Blanchet, Bertrand Dupouy |
| title_full_unstemmed | Computer architecture Gérard Blanchet, Bertrand Dupouy |
| title_short | Computer architecture |
| title_sort | computer architecture |
| topic | Computer architecture Computerarchitektur (DE-588)4048717-9 gnd |
| topic_facet | Computer architecture Computerarchitektur |
| work_keys_str_mv | AT blanchetgerard computerarchitecture AT dupouybertrand computerarchitecture |