Formal verification of simulink/stateflow diagrams: a deductive approach
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| Main Authors: | , , |
|---|---|
| Format: | Electronic eBook |
| Language: | English |
| Published: |
Cham
Springer
2017
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| Subjects: | |
| Online Access: | BTU01 FAB01 FAW01 FHA01 FHI01 FHN01 FHR01 FKE01 FLA01 FRO01 FWS01 FWS02 TUM01 UBY01 Volltext |
| Physical Description: | 1 Online Ressource (xv, 258 Seiten) Illustrationen, Diagramme |
| ISBN: | 9783319470160 |
| DOI: | 10.1007/978-3-319-47016-0 |
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Record in the Search Index
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| author | Zhan, Naijun Wang, Shuling Zhao, Hengjun |
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| author_facet | Zhan, Naijun Wang, Shuling Zhao, Hengjun |
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| discipline | Informatik Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik Maschinenbau |
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| id | DE-604.BV043934351 |
| illustrated | Not Illustrated |
| indexdate | 2025-02-20T06:53:42Z |
| institution | BVB |
| isbn | 9783319470160 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-029343366 |
| oclc_num | 965658455 |
| open_access_boolean | |
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| physical | 1 Online Ressource (xv, 258 Seiten) Illustrationen, Diagramme |
| psigel | ZDB-2-ENG ZDB-2-ENG_2017 |
| publishDate | 2017 |
| publishDateSearch | 2017 |
| publishDateSort | 2017 |
| publisher | Springer |
| record_format | marc |
| spellingShingle | Zhan, Naijun Wang, Shuling Zhao, Hengjun Formal verification of simulink/stateflow diagrams a deductive approach Engineering Microprocessors Electronic circuits Circuits and Systems Processor Architectures Electronic Circuits and Devices Ingenieurwissenschaften |
| title | Formal verification of simulink/stateflow diagrams a deductive approach |
| title_auth | Formal verification of simulink/stateflow diagrams a deductive approach |
| title_exact_search | Formal verification of simulink/stateflow diagrams a deductive approach |
| title_full | Formal verification of simulink/stateflow diagrams a deductive approach Naijun Zhan, Shuling Wang, Hengjun Zhao |
| title_fullStr | Formal verification of simulink/stateflow diagrams a deductive approach Naijun Zhan, Shuling Wang, Hengjun Zhao |
| title_full_unstemmed | Formal verification of simulink/stateflow diagrams a deductive approach Naijun Zhan, Shuling Wang, Hengjun Zhao |
| title_short | Formal verification of simulink/stateflow diagrams |
| title_sort | formal verification of simulink stateflow diagrams a deductive approach |
| title_sub | a deductive approach |
| topic | Engineering Microprocessors Electronic circuits Circuits and Systems Processor Architectures Electronic Circuits and Devices Ingenieurwissenschaften |
| topic_facet | Engineering Microprocessors Electronic circuits Circuits and Systems Processor Architectures Electronic Circuits and Devices Ingenieurwissenschaften |
| url | https://doi.org/10.1007/978-3-319-47016-0 |
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