Formal verification of simulink/stateflow diagrams: a deductive approach
Gespeichert in:
Hauptverfasser: | , , |
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Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
Cham
Springer
2017
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Schlagworte: | |
Online-Zugang: | BTU01 FAB01 FAW01 FHA01 FHI01 FHN01 FHR01 FKE01 FLA01 FRO01 FWS01 FWS02 TUM01 UBY01 Volltext |
Beschreibung: | 1 Online Ressource (xv, 258 Seiten) Illustrationen, Diagramme |
ISBN: | 9783319470160 |
DOI: | 10.1007/978-3-319-47016-0 |
Internformat
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Datensatz im Suchindex
DE-BY-FWS_katkey | 633241 |
---|---|
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any_adam_object | |
author | Zhan, Naijun Wang, Shuling Zhao, Hengjun |
author_GND | (DE-588)1121014690 (DE-588)1121015905 |
author_facet | Zhan, Naijun Wang, Shuling Zhao, Hengjun |
author_role | aut aut aut |
author_sort | Zhan, Naijun |
author_variant | n z nz s w sw h z hz |
building | Verbundindex |
bvnumber | BV043934351 |
classification_rvk | ST 601 |
classification_tum | ELT 000 MAS 000 |
collection | ZDB-2-ENG |
ctrlnum | (ZDB-2-ENG)978-3-319-47016-0 (OCoLC)965658455 (DE-599)BVBBV043934351 |
dewey-full | 621.3815 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.3815 |
dewey-search | 621.3815 |
dewey-sort | 3621.3815 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Informatik Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik Maschinenbau |
doi_str_mv | 10.1007/978-3-319-47016-0 |
format | Electronic eBook |
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id | DE-604.BV043934351 |
illustrated | Not Illustrated |
indexdate | 2024-08-01T12:25:55Z |
institution | BVB |
isbn | 9783319470160 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-029343366 |
oclc_num | 965658455 |
open_access_boolean | |
owner | DE-859 DE-1046 DE-860 DE-898 DE-BY-UBR DE-706 DE-92 DE-1043 DE-91 DE-BY-TUM DE-Aug4 DE-861 DE-573 DE-863 DE-BY-FWS DE-634 DE-862 DE-BY-FWS |
owner_facet | DE-859 DE-1046 DE-860 DE-898 DE-BY-UBR DE-706 DE-92 DE-1043 DE-91 DE-BY-TUM DE-Aug4 DE-861 DE-573 DE-863 DE-BY-FWS DE-634 DE-862 DE-BY-FWS |
physical | 1 Online Ressource (xv, 258 Seiten) Illustrationen, Diagramme |
psigel | ZDB-2-ENG ZDB-2-ENG_2017 |
publishDate | 2017 |
publishDateSearch | 2017 |
publishDateSort | 2017 |
publisher | Springer |
record_format | marc |
spellingShingle | Zhan, Naijun Wang, Shuling Zhao, Hengjun Formal verification of simulink/stateflow diagrams a deductive approach Engineering Microprocessors Electronic circuits Circuits and Systems Processor Architectures Electronic Circuits and Devices Ingenieurwissenschaften |
title | Formal verification of simulink/stateflow diagrams a deductive approach |
title_auth | Formal verification of simulink/stateflow diagrams a deductive approach |
title_exact_search | Formal verification of simulink/stateflow diagrams a deductive approach |
title_full | Formal verification of simulink/stateflow diagrams a deductive approach Naijun Zhan, Shuling Wang, Hengjun Zhao |
title_fullStr | Formal verification of simulink/stateflow diagrams a deductive approach Naijun Zhan, Shuling Wang, Hengjun Zhao |
title_full_unstemmed | Formal verification of simulink/stateflow diagrams a deductive approach Naijun Zhan, Shuling Wang, Hengjun Zhao |
title_short | Formal verification of simulink/stateflow diagrams |
title_sort | formal verification of simulink stateflow diagrams a deductive approach |
title_sub | a deductive approach |
topic | Engineering Microprocessors Electronic circuits Circuits and Systems Processor Architectures Electronic Circuits and Devices Ingenieurwissenschaften |
topic_facet | Engineering Microprocessors Electronic circuits Circuits and Systems Processor Architectures Electronic Circuits and Devices Ingenieurwissenschaften |
url | https://doi.org/10.1007/978-3-319-47016-0 |
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