Physics and Technology of Crystalline Oxide Semiconductor CAAC-IGZO: Application to LSI
Gespeichert in:
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| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Chichester, West Sussex
Wiley
2017
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| Schriftenreihe: | Wiley Series in Display Technology
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| Schlagworte: | |
| Online-Zugang: | FRO01 UBG01 URL des Erstveröffentlichers |
| Beschreibung: | Description based upon print version of record |
| Beschreibung: | 1 online resource (380 p.) |
| ISBN: | 111924742X 9781119247425 |
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| 505 | 8 | |a Title Page ; Copyright; Contents; About the Editors; List of Contributors ; Series Editor's Foreword ; Preface; Acknowledgments; Chapter 1 Introduction; 1.1 Overview of this Book; 1.2 Background; 1.2.1 Typical Characteristics of CAAC-IGZO FETs; 1.2.2 Possible Applications of CAAC-IGZO FETs; 1.3 Summary of Each Chapter; References; Chapter 2 Device Physics of CAAC-IGZO FET ; 2.1 Introduction; 2.2 Off-State Current; 2.2.1 Off-State Current Comparison between Si and CAAC-IGZO FETs; 2.2.2 Measurement of Extremely Low Off-State Current; 2.2.3 Theoretical Discussion with Energy Band Diagram | |
| 505 | 8 | |a 2.2.4 Conclusion2.3 Subthreshold Characteristics; 2.3.1 Estimation of Icut by SS; 2.3.2 Extraction Method of Interface Levels; 2.3.3 Reproduction of Measured Value and Estimation of Icut; 2.3.4 Conclusion; 2.4 Technique for Controlling Threshold Voltage (Vth); 2.4.1 Vth Control by Application of Back-Gate Bias; 2.4.2 Vth Control by Formation of Circuit for Retaining Back-Gate Bias; 2.4.3 Vth Control by Charge Injection into the Charge Trap Layer; 2.4.4 Conclusion; 2.5 On-State Characteristics; 2.5.1 Channel-Length Dependence of Field-Effect Mobility; 2.5.2 Measurement of Cut-off Frequency | |
| 505 | 8 | |a 2.5.3 Summary2.6 Short-Channel Effect; 2.6.1 Features of S-ch CAAC-IGZO FETs; 2.6.2 Effect of S-ch Structure; 2.6.3 Intrinsic Accumulation-Mode Device; 2.6.4 Dielectric Anisotropy; 2.6.5 Numerical Calculation of the Band Diagrams in IGZO FETs; 2.6.6 Summary; 2.7 20-nm-Node CAAC-IGZO FET; 2.7.1 TGSA CAAC-IGZO FET; 2.7.2 Device Characteristics; 2.7.3 Memory-Retention Characteristics; 2.7.4 Summary; 2.8 Hybrid Structure; 2.8.1 TGTC Structure; 2.8.2 TGSA Structure; 2.8.3 Hybrid Structure; Appendix: Comparison between CAAC-IGZO and Si; References; Chapter 3 NOSRAM ; 3.1 Introduction | |
| 505 | 8 | |a 3.2 Memory Characteristics3.3 Application of CAAC-IGZO FETs to Memory and their Operation; 3.4 Configuration and Operation of NOSRAM Module; 3.4.1 NOSRAM Module; 3.4.2 Setting Operational Voltage of NOSRAM Module; 3.4.3 Operation of NOSRAM Module; 3.5 Multilevel NOSRAM; 3.5.1 4-Level (2 Bits/Cell) NOSRAM Module; 3.5.2 8-Level (3 Bits/Cell) NOSRAM Module; 3.5.3 16-Level (4 Bits/Cell) NOSRAM Module; 3.5.4 Stacked Multilevel NOSRAM; 3.6 Prototype and Characterization; 3.6.1 2-Level NOSRAM; 3.6.2 4-Level NOSRAM; 3.6.3 8-Level NOSRAM; 3.6.4 16-Level NOSRAM; 3.6.5 Comparison of Prototypes. - ReferencesChapter 4 DOSRAM ; 4.1 Introduction; 4.2 Characteristics and Problems of DRAM; 4.3 Operations and Characteristics of DOSRAM Memory Cell; 4.4 Configuration and Basic Operation of DOSRAM; 4.4.1 Circuit Configuration and Operation of DOSRAM; 4.4.2 Hybrid Structure of DOSRAM; 4.5 Operation of Sense Amplifier; 4.5.1 Writing Operation; 4.5.2 Reading Operation; 4.6 Characteristic Measurement; 4.6.1 Writing Characteristics; 4.6.2 Reading Characteristics; 4.6.3 Data-Retention Characteristics; 4.6.4 Summary of 8-kbit DOSRAM; 4.7 Prototype DOSRAM Using 60-nm Technology Node. - 4.7.1 Configuration of Prototype | |
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Datensatz im Suchindex
| _version_ | 1804176799832211456 |
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| author | Yamazaki, Shunpei |
| author_facet | Yamazaki, Shunpei |
| author_role | aut |
| author_sort | Yamazaki, Shunpei |
| author_variant | s y sy |
| building | Verbundindex |
| bvnumber | BV043897783 |
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| contents | Title Page ; Copyright; Contents; About the Editors; List of Contributors ; Series Editor's Foreword ; Preface; Acknowledgments; Chapter 1 Introduction; 1.1 Overview of this Book; 1.2 Background; 1.2.1 Typical Characteristics of CAAC-IGZO FETs; 1.2.2 Possible Applications of CAAC-IGZO FETs; 1.3 Summary of Each Chapter; References; Chapter 2 Device Physics of CAAC-IGZO FET ; 2.1 Introduction; 2.2 Off-State Current; 2.2.1 Off-State Current Comparison between Si and CAAC-IGZO FETs; 2.2.2 Measurement of Extremely Low Off-State Current; 2.2.3 Theoretical Discussion with Energy Band Diagram 2.2.4 Conclusion2.3 Subthreshold Characteristics; 2.3.1 Estimation of Icut by SS; 2.3.2 Extraction Method of Interface Levels; 2.3.3 Reproduction of Measured Value and Estimation of Icut; 2.3.4 Conclusion; 2.4 Technique for Controlling Threshold Voltage (Vth); 2.4.1 Vth Control by Application of Back-Gate Bias; 2.4.2 Vth Control by Formation of Circuit for Retaining Back-Gate Bias; 2.4.3 Vth Control by Charge Injection into the Charge Trap Layer; 2.4.4 Conclusion; 2.5 On-State Characteristics; 2.5.1 Channel-Length Dependence of Field-Effect Mobility; 2.5.2 Measurement of Cut-off Frequency 2.5.3 Summary2.6 Short-Channel Effect; 2.6.1 Features of S-ch CAAC-IGZO FETs; 2.6.2 Effect of S-ch Structure; 2.6.3 Intrinsic Accumulation-Mode Device; 2.6.4 Dielectric Anisotropy; 2.6.5 Numerical Calculation of the Band Diagrams in IGZO FETs; 2.6.6 Summary; 2.7 20-nm-Node CAAC-IGZO FET; 2.7.1 TGSA CAAC-IGZO FET; 2.7.2 Device Characteristics; 2.7.3 Memory-Retention Characteristics; 2.7.4 Summary; 2.8 Hybrid Structure; 2.8.1 TGTC Structure; 2.8.2 TGSA Structure; 2.8.3 Hybrid Structure; Appendix: Comparison between CAAC-IGZO and Si; References; Chapter 3 NOSRAM ; 3.1 Introduction 3.2 Memory Characteristics3.3 Application of CAAC-IGZO FETs to Memory and their Operation; 3.4 Configuration and Operation of NOSRAM Module; 3.4.1 NOSRAM Module; 3.4.2 Setting Operational Voltage of NOSRAM Module; 3.4.3 Operation of NOSRAM Module; 3.5 Multilevel NOSRAM; 3.5.1 4-Level (2 Bits/Cell) NOSRAM Module; 3.5.2 8-Level (3 Bits/Cell) NOSRAM Module; 3.5.3 16-Level (4 Bits/Cell) NOSRAM Module; 3.5.4 Stacked Multilevel NOSRAM; 3.6 Prototype and Characterization; 3.6.1 2-Level NOSRAM; 3.6.2 4-Level NOSRAM; 3.6.3 8-Level NOSRAM; 3.6.4 16-Level NOSRAM; 3.6.5 Comparison of Prototypes. - ReferencesChapter 4 DOSRAM ; 4.1 Introduction; 4.2 Characteristics and Problems of DRAM; 4.3 Operations and Characteristics of DOSRAM Memory Cell; 4.4 Configuration and Basic Operation of DOSRAM; 4.4.1 Circuit Configuration and Operation of DOSRAM; 4.4.2 Hybrid Structure of DOSRAM; 4.5 Operation of Sense Amplifier; 4.5.1 Writing Operation; 4.5.2 Reading Operation; 4.6 Characteristic Measurement; 4.6.1 Writing Characteristics; 4.6.2 Reading Characteristics; 4.6.3 Data-Retention Characteristics; 4.6.4 Summary of 8-kbit DOSRAM; 4.7 Prototype DOSRAM Using 60-nm Technology Node. - 4.7.1 Configuration of Prototype |
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| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
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| indexdate | 2024-07-10T07:37:55Z |
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| isbn | 111924742X 9781119247425 |
| language | English |
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| series2 | Wiley Series in Display Technology |
| spelling | Yamazaki, Shunpei Verfasser aut Physics and Technology of Crystalline Oxide Semiconductor CAAC-IGZO Application to LSI Chichester, West Sussex Wiley 2017 1 online resource (380 p.) txt rdacontent c rdamedia cr rdacarrier Wiley Series in Display Technology Description based upon print version of record Title Page ; Copyright; Contents; About the Editors; List of Contributors ; Series Editor's Foreword ; Preface; Acknowledgments; Chapter 1 Introduction; 1.1 Overview of this Book; 1.2 Background; 1.2.1 Typical Characteristics of CAAC-IGZO FETs; 1.2.2 Possible Applications of CAAC-IGZO FETs; 1.3 Summary of Each Chapter; References; Chapter 2 Device Physics of CAAC-IGZO FET ; 2.1 Introduction; 2.2 Off-State Current; 2.2.1 Off-State Current Comparison between Si and CAAC-IGZO FETs; 2.2.2 Measurement of Extremely Low Off-State Current; 2.2.3 Theoretical Discussion with Energy Band Diagram 2.2.4 Conclusion2.3 Subthreshold Characteristics; 2.3.1 Estimation of Icut by SS; 2.3.2 Extraction Method of Interface Levels; 2.3.3 Reproduction of Measured Value and Estimation of Icut; 2.3.4 Conclusion; 2.4 Technique for Controlling Threshold Voltage (Vth); 2.4.1 Vth Control by Application of Back-Gate Bias; 2.4.2 Vth Control by Formation of Circuit for Retaining Back-Gate Bias; 2.4.3 Vth Control by Charge Injection into the Charge Trap Layer; 2.4.4 Conclusion; 2.5 On-State Characteristics; 2.5.1 Channel-Length Dependence of Field-Effect Mobility; 2.5.2 Measurement of Cut-off Frequency 2.5.3 Summary2.6 Short-Channel Effect; 2.6.1 Features of S-ch CAAC-IGZO FETs; 2.6.2 Effect of S-ch Structure; 2.6.3 Intrinsic Accumulation-Mode Device; 2.6.4 Dielectric Anisotropy; 2.6.5 Numerical Calculation of the Band Diagrams in IGZO FETs; 2.6.6 Summary; 2.7 20-nm-Node CAAC-IGZO FET; 2.7.1 TGSA CAAC-IGZO FET; 2.7.2 Device Characteristics; 2.7.3 Memory-Retention Characteristics; 2.7.4 Summary; 2.8 Hybrid Structure; 2.8.1 TGTC Structure; 2.8.2 TGSA Structure; 2.8.3 Hybrid Structure; Appendix: Comparison between CAAC-IGZO and Si; References; Chapter 3 NOSRAM ; 3.1 Introduction 3.2 Memory Characteristics3.3 Application of CAAC-IGZO FETs to Memory and their Operation; 3.4 Configuration and Operation of NOSRAM Module; 3.4.1 NOSRAM Module; 3.4.2 Setting Operational Voltage of NOSRAM Module; 3.4.3 Operation of NOSRAM Module; 3.5 Multilevel NOSRAM; 3.5.1 4-Level (2 Bits/Cell) NOSRAM Module; 3.5.2 8-Level (3 Bits/Cell) NOSRAM Module; 3.5.3 16-Level (4 Bits/Cell) NOSRAM Module; 3.5.4 Stacked Multilevel NOSRAM; 3.6 Prototype and Characterization; 3.6.1 2-Level NOSRAM; 3.6.2 4-Level NOSRAM; 3.6.3 8-Level NOSRAM; 3.6.4 16-Level NOSRAM; 3.6.5 Comparison of Prototypes. - ReferencesChapter 4 DOSRAM ; 4.1 Introduction; 4.2 Characteristics and Problems of DRAM; 4.3 Operations and Characteristics of DOSRAM Memory Cell; 4.4 Configuration and Basic Operation of DOSRAM; 4.4.1 Circuit Configuration and Operation of DOSRAM; 4.4.2 Hybrid Structure of DOSRAM; 4.5 Operation of Sense Amplifier; 4.5.1 Writing Operation; 4.5.2 Reading Operation; 4.6 Characteristic Measurement; 4.6.1 Writing Characteristics; 4.6.2 Reading Characteristics; 4.6.3 Data-Retention Characteristics; 4.6.4 Summary of 8-kbit DOSRAM; 4.7 Prototype DOSRAM Using 60-nm Technology Node. - 4.7.1 Configuration of Prototype Electronic books Fujita, Masahiro Sonstige oth Erscheint auch als Druckausgabe 978-1-119-24734-0 https://onlinelibrary.wiley.com/doi/book/10.1002/9781119247418 Verlag URL des Erstveröffentlichers Volltext |
| spellingShingle | Yamazaki, Shunpei Physics and Technology of Crystalline Oxide Semiconductor CAAC-IGZO Application to LSI Title Page ; Copyright; Contents; About the Editors; List of Contributors ; Series Editor's Foreword ; Preface; Acknowledgments; Chapter 1 Introduction; 1.1 Overview of this Book; 1.2 Background; 1.2.1 Typical Characteristics of CAAC-IGZO FETs; 1.2.2 Possible Applications of CAAC-IGZO FETs; 1.3 Summary of Each Chapter; References; Chapter 2 Device Physics of CAAC-IGZO FET ; 2.1 Introduction; 2.2 Off-State Current; 2.2.1 Off-State Current Comparison between Si and CAAC-IGZO FETs; 2.2.2 Measurement of Extremely Low Off-State Current; 2.2.3 Theoretical Discussion with Energy Band Diagram 2.2.4 Conclusion2.3 Subthreshold Characteristics; 2.3.1 Estimation of Icut by SS; 2.3.2 Extraction Method of Interface Levels; 2.3.3 Reproduction of Measured Value and Estimation of Icut; 2.3.4 Conclusion; 2.4 Technique for Controlling Threshold Voltage (Vth); 2.4.1 Vth Control by Application of Back-Gate Bias; 2.4.2 Vth Control by Formation of Circuit for Retaining Back-Gate Bias; 2.4.3 Vth Control by Charge Injection into the Charge Trap Layer; 2.4.4 Conclusion; 2.5 On-State Characteristics; 2.5.1 Channel-Length Dependence of Field-Effect Mobility; 2.5.2 Measurement of Cut-off Frequency 2.5.3 Summary2.6 Short-Channel Effect; 2.6.1 Features of S-ch CAAC-IGZO FETs; 2.6.2 Effect of S-ch Structure; 2.6.3 Intrinsic Accumulation-Mode Device; 2.6.4 Dielectric Anisotropy; 2.6.5 Numerical Calculation of the Band Diagrams in IGZO FETs; 2.6.6 Summary; 2.7 20-nm-Node CAAC-IGZO FET; 2.7.1 TGSA CAAC-IGZO FET; 2.7.2 Device Characteristics; 2.7.3 Memory-Retention Characteristics; 2.7.4 Summary; 2.8 Hybrid Structure; 2.8.1 TGTC Structure; 2.8.2 TGSA Structure; 2.8.3 Hybrid Structure; Appendix: Comparison between CAAC-IGZO and Si; References; Chapter 3 NOSRAM ; 3.1 Introduction 3.2 Memory Characteristics3.3 Application of CAAC-IGZO FETs to Memory and their Operation; 3.4 Configuration and Operation of NOSRAM Module; 3.4.1 NOSRAM Module; 3.4.2 Setting Operational Voltage of NOSRAM Module; 3.4.3 Operation of NOSRAM Module; 3.5 Multilevel NOSRAM; 3.5.1 4-Level (2 Bits/Cell) NOSRAM Module; 3.5.2 8-Level (3 Bits/Cell) NOSRAM Module; 3.5.3 16-Level (4 Bits/Cell) NOSRAM Module; 3.5.4 Stacked Multilevel NOSRAM; 3.6 Prototype and Characterization; 3.6.1 2-Level NOSRAM; 3.6.2 4-Level NOSRAM; 3.6.3 8-Level NOSRAM; 3.6.4 16-Level NOSRAM; 3.6.5 Comparison of Prototypes. - ReferencesChapter 4 DOSRAM ; 4.1 Introduction; 4.2 Characteristics and Problems of DRAM; 4.3 Operations and Characteristics of DOSRAM Memory Cell; 4.4 Configuration and Basic Operation of DOSRAM; 4.4.1 Circuit Configuration and Operation of DOSRAM; 4.4.2 Hybrid Structure of DOSRAM; 4.5 Operation of Sense Amplifier; 4.5.1 Writing Operation; 4.5.2 Reading Operation; 4.6 Characteristic Measurement; 4.6.1 Writing Characteristics; 4.6.2 Reading Characteristics; 4.6.3 Data-Retention Characteristics; 4.6.4 Summary of 8-kbit DOSRAM; 4.7 Prototype DOSRAM Using 60-nm Technology Node. - 4.7.1 Configuration of Prototype |
| title | Physics and Technology of Crystalline Oxide Semiconductor CAAC-IGZO Application to LSI |
| title_auth | Physics and Technology of Crystalline Oxide Semiconductor CAAC-IGZO Application to LSI |
| title_exact_search | Physics and Technology of Crystalline Oxide Semiconductor CAAC-IGZO Application to LSI |
| title_full | Physics and Technology of Crystalline Oxide Semiconductor CAAC-IGZO Application to LSI |
| title_fullStr | Physics and Technology of Crystalline Oxide Semiconductor CAAC-IGZO Application to LSI |
| title_full_unstemmed | Physics and Technology of Crystalline Oxide Semiconductor CAAC-IGZO Application to LSI |
| title_short | Physics and Technology of Crystalline Oxide Semiconductor CAAC-IGZO |
| title_sort | physics and technology of crystalline oxide semiconductor caac igzo application to lsi |
| title_sub | Application to LSI |
| url | https://onlinelibrary.wiley.com/doi/book/10.1002/9781119247418 |
| work_keys_str_mv | AT yamazakishunpei physicsandtechnologyofcrystallineoxidesemiconductorcaacigzoapplicationtolsi AT fujitamasahiro physicsandtechnologyofcrystallineoxidesemiconductorcaacigzoapplicationtolsi |