Automatic analog IC sizing and optimization constrained with PVT corners and layout effects:
Gespeichert in:
| Hauptverfasser: | , , |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Cham
Springer
2017
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| Schlagworte: | |
| Online-Zugang: | BTU01 FAB01 FAW01 FHA01 FHI01 FHN01 FHR01 FKE01 FLA01 FRO01 FWS01 FWS02 TUM01 UBY01 Volltext |
| Beschreibung: | 1 Online-Ressource (xxvii, 182 Seiten) Illustrationen, Diagramme |
| ISBN: | 9783319420370 |
| DOI: | 10.1007/978-3-319-42037-0 |
Internformat
MARC
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| 245 | 1 | 0 | |a Automatic analog IC sizing and optimization constrained with PVT corners and layout effects |c Nuno Lourenço, Ricardo Martins, Nuno Horta |
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| 700 | 1 | |a Horta, Nuno C. G. |e Verfasser |0 (DE-588)1155433718 |4 aut | |
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Datensatz im Suchindex
| DE-BY-FWS_katkey | 630560 |
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| _version_ | 1806180310484779008 |
| any_adam_object | |
| author | Lourenço, Nuno Martins, Ricardo Horta, Nuno C. G. |
| author_GND | (DE-588)1155433718 |
| author_facet | Lourenço, Nuno Martins, Ricardo Horta, Nuno C. G. |
| author_role | aut aut aut |
| author_sort | Lourenço, Nuno |
| author_variant | n l nl r m rm n c g h ncg ncgh |
| building | Verbundindex |
| bvnumber | BV043862320 |
| classification_tum | ELT 000 MAS 000 |
| collection | ZDB-2-ENG |
| ctrlnum | (ZDB-2-ENG)9783319420370 (OCoLC)955135712 (DE-599)BVBBV043862320 |
| dewey-full | 621.3815 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3815 |
| dewey-search | 621.3815 |
| dewey-sort | 3621.3815 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik Maschinenbau |
| doi_str_mv | 10.1007/978-3-319-42037-0 |
| format | Electronic eBook |
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| id | DE-604.BV043862320 |
| illustrated | Not Illustrated |
| indexdate | 2024-08-01T12:22:52Z |
| institution | BVB |
| isbn | 9783319420370 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-029272394 |
| oclc_num | 955135712 |
| open_access_boolean | |
| owner | DE-859 DE-1046 DE-860 DE-898 DE-BY-UBR DE-706 DE-92 DE-1043 DE-91 DE-BY-TUM DE-634 DE-Aug4 DE-861 DE-863 DE-BY-FWS DE-862 DE-BY-FWS DE-573 |
| owner_facet | DE-859 DE-1046 DE-860 DE-898 DE-BY-UBR DE-706 DE-92 DE-1043 DE-91 DE-BY-TUM DE-634 DE-Aug4 DE-861 DE-863 DE-BY-FWS DE-862 DE-BY-FWS DE-573 |
| physical | 1 Online-Ressource (xxvii, 182 Seiten) Illustrationen, Diagramme |
| psigel | ZDB-2-ENG ZDB-2-ENG_2017 |
| publishDate | 2017 |
| publishDateSearch | 2017 |
| publishDateSort | 2017 |
| publisher | Springer |
| record_format | marc |
| spellingShingle | Lourenço, Nuno Martins, Ricardo Horta, Nuno C. G. Automatic analog IC sizing and optimization constrained with PVT corners and layout effects Engineering Microprocessors Electronics Microelectronics Electronic circuits Circuits and Systems Processor Architectures Electronics and Microelectronics, Instrumentation Ingenieurwissenschaften |
| title | Automatic analog IC sizing and optimization constrained with PVT corners and layout effects |
| title_auth | Automatic analog IC sizing and optimization constrained with PVT corners and layout effects |
| title_exact_search | Automatic analog IC sizing and optimization constrained with PVT corners and layout effects |
| title_full | Automatic analog IC sizing and optimization constrained with PVT corners and layout effects Nuno Lourenço, Ricardo Martins, Nuno Horta |
| title_fullStr | Automatic analog IC sizing and optimization constrained with PVT corners and layout effects Nuno Lourenço, Ricardo Martins, Nuno Horta |
| title_full_unstemmed | Automatic analog IC sizing and optimization constrained with PVT corners and layout effects Nuno Lourenço, Ricardo Martins, Nuno Horta |
| title_short | Automatic analog IC sizing and optimization constrained with PVT corners and layout effects |
| title_sort | automatic analog ic sizing and optimization constrained with pvt corners and layout effects |
| topic | Engineering Microprocessors Electronics Microelectronics Electronic circuits Circuits and Systems Processor Architectures Electronics and Microelectronics, Instrumentation Ingenieurwissenschaften |
| topic_facet | Engineering Microprocessors Electronics Microelectronics Electronic circuits Circuits and Systems Processor Architectures Electronics and Microelectronics, Instrumentation Ingenieurwissenschaften |
| url | https://doi.org/10.1007/978-3-319-42037-0 |
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