Digital electronics 2: sequential and arithmetic logic circuits
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
London
Iste
2016
Hoboken, NJ Wiley |
| Schlagworte: | |
| Online-Zugang: | FRO01 UBG01 Volltext |
| Beschreibung: | Cover ; Title Page; Copyright ; Contents; Preface; P.1. Summary; P.2. The reader; 1. Latch and Flip-Flop; 1.1. Introduction; 1.2. General overview; 1.2.1. SR latch; 1.2.2. \bar{S} \bar{R} latch; 1.2.3. Application: switch debouncing; 1.3. Gated SR latch; 1.3.1. Implementation based on an SR latch; 1.3.2. Implementation based on an \bar{S} \bar{R} latch; 1.4. Gated D latch; 1.5. Basic JK flip-flop; 1.6. T flip-flop; 1.7. Master-slave and edge-triggered flip-flop; 1.7.1. Master-slave flip-flop; 1.7.2. Edge-triggered flip-flop; 1.8. Flip-flops with asynchronous inputs 1.9. Operational characteristics of flip-flops1.10. Exercises; 1.11. Solutions; 2. Binary Counters; 2.1. Introduction; 2.2. Modulo 4 counter; 2.3. Modulo 8 counter; 2.4. Modulo 16 counter; 2.4.1. Modulo 10 counter; 2.5. Counter with parallel load; 2.6. Down counter; 2.7. Synchronous reversible counter; 2.8. Decoding a down counter; 2.9. Exercises; 2.10. Solutions; 3. Shift Register; 3.1. Introduction; 3.2. Serial-in shift register; 3.3. Parallel-in shift register; 3.4. Bidirectional shift register; 3.5. Register file; 3.6. Shift register based counter; 3.6.1. Ring counter 3.6.2. Johnson counter3.6.3. Linear feedback counter; 3.7. Exercises; 3.8. Solutions; 4. Arithmetic and Logic Circuits; 4.1. Introduction; 4.2. Adder; 4.2.1. Half adder; 4.2.2. Full adder; 4.2.3. Ripple-carry adder; 4.2.4. Carry-lookahead adder; 4.2.5. Carry-select adder; 4.2.6. Carry-skip adder; 4.3. Comparator; 4.4. Arithmetic and logic unit; 4.5. Multiplier; 4.5.1. Multiplier of 2-bit unsigned numbers; 4.5.2. Multiplier of 4-bit unsigned numbers; 4.5.3. Multiplier for signed numbers; 4.6. Divider; 4.7. Exercises; 4.8. Solutions; 5. Digital Integrated Circuit Technology; 5.1. Introduction 5.2. Characteristics of the technologies5.2.1. Supply voltage; 5.2.2. Logic levels; 5.2.3. Immunity to noise; 5.2.4. Propagation delay; 5.2.5. Electric power consumption; 5.2.6. Fan-out or load factor; 5.3. TTL logic family; 5.3.1. Bipolar junction transistor; 5.3.2. TTL NAND gate; 5.3.3. Integrated TTL circuit; 5.4. CMOS logic family; 5.4.1. MOSFET transistor; 5.4.2. CMOS logic gates; 5.5. Open drain logic gates; 5.5.1. Three-state buffer; 5.5.2. CMOS integrated circuit; 5.6. Other logic families; 5.7. Interfacing circuits of different technologies; 5.8. Exercises; 5.9. Solutions 6. Semiconductor Memory6.1. Introduction; 6.2. Memory organization; 6.3. Operation of a memory; 6.4. Types of memory; 6.4.1. Non-volatile memory; 6.4.2. Volatile memories; 6.4.3. Characteristics of the different memory types; 6.5. Applications; 6.5.1. Memory organization; 6.5.2. Applications; 6.6. Other types of memory; 6.6.1. Ferromagnetic RAM; 6.6.2. Content-addressable memory; 6.6.3. Sequential access memory; 6.7. Exercises; 6.8. Solutions; 7. Programmable Logic Circuits; 7.1. General overview; 7.2. Programmable logic device; 7.3. Applications; 7.3.1. Implementation of logic functions. - 7.3.2. Two-bit adder. - Includes bibliographical references and index |
| Beschreibung: | 1 Online-Ressource (x, 313 Seiten ) Diagramme |
| ISBN: | 9781119329756 1119329752 9781119329763 1119329760 |
Internformat
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| 245 | 1 | 0 | |a Digital electronics 2 |b sequential and arithmetic logic circuits |c Tertulien Ndjountche |
| 264 | 1 | |a London |b Iste |c 2016 | |
| 264 | 1 | |a Hoboken, NJ |b Wiley | |
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| 500 | |a Cover ; Title Page; Copyright ; Contents; Preface; P.1. Summary; P.2. The reader; 1. Latch and Flip-Flop; 1.1. Introduction; 1.2. General overview; 1.2.1. SR latch; 1.2.2. \bar{S} \bar{R} latch; 1.2.3. Application: switch debouncing; 1.3. Gated SR latch; 1.3.1. Implementation based on an SR latch; 1.3.2. Implementation based on an \bar{S} \bar{R} latch; 1.4. Gated D latch; 1.5. Basic JK flip-flop; 1.6. T flip-flop; 1.7. Master-slave and edge-triggered flip-flop; 1.7.1. Master-slave flip-flop; 1.7.2. Edge-triggered flip-flop; 1.8. Flip-flops with asynchronous inputs | ||
| 500 | |a 1.9. Operational characteristics of flip-flops1.10. Exercises; 1.11. Solutions; 2. Binary Counters; 2.1. Introduction; 2.2. Modulo 4 counter; 2.3. Modulo 8 counter; 2.4. Modulo 16 counter; 2.4.1. Modulo 10 counter; 2.5. Counter with parallel load; 2.6. Down counter; 2.7. Synchronous reversible counter; 2.8. Decoding a down counter; 2.9. Exercises; 2.10. Solutions; 3. Shift Register; 3.1. Introduction; 3.2. Serial-in shift register; 3.3. Parallel-in shift register; 3.4. Bidirectional shift register; 3.5. Register file; 3.6. Shift register based counter; 3.6.1. Ring counter | ||
| 500 | |a 3.6.2. Johnson counter3.6.3. Linear feedback counter; 3.7. Exercises; 3.8. Solutions; 4. Arithmetic and Logic Circuits; 4.1. Introduction; 4.2. Adder; 4.2.1. Half adder; 4.2.2. Full adder; 4.2.3. Ripple-carry adder; 4.2.4. Carry-lookahead adder; 4.2.5. Carry-select adder; 4.2.6. Carry-skip adder; 4.3. Comparator; 4.4. Arithmetic and logic unit; 4.5. Multiplier; 4.5.1. Multiplier of 2-bit unsigned numbers; 4.5.2. Multiplier of 4-bit unsigned numbers; 4.5.3. Multiplier for signed numbers; 4.6. Divider; 4.7. Exercises; 4.8. Solutions; 5. Digital Integrated Circuit Technology; 5.1. Introduction | ||
| 500 | |a 5.2. Characteristics of the technologies5.2.1. Supply voltage; 5.2.2. Logic levels; 5.2.3. Immunity to noise; 5.2.4. Propagation delay; 5.2.5. Electric power consumption; 5.2.6. Fan-out or load factor; 5.3. TTL logic family; 5.3.1. Bipolar junction transistor; 5.3.2. TTL NAND gate; 5.3.3. Integrated TTL circuit; 5.4. CMOS logic family; 5.4.1. MOSFET transistor; 5.4.2. CMOS logic gates; 5.5. Open drain logic gates; 5.5.1. Three-state buffer; 5.5.2. CMOS integrated circuit; 5.6. Other logic families; 5.7. Interfacing circuits of different technologies; 5.8. Exercises; 5.9. Solutions | ||
| 500 | |a 6. Semiconductor Memory6.1. Introduction; 6.2. Memory organization; 6.3. Operation of a memory; 6.4. Types of memory; 6.4.1. Non-volatile memory; 6.4.2. Volatile memories; 6.4.3. Characteristics of the different memory types; 6.5. Applications; 6.5.1. Memory organization; 6.5.2. Applications; 6.6. Other types of memory; 6.6.1. Ferromagnetic RAM; 6.6.2. Content-addressable memory; 6.6.3. Sequential access memory; 6.7. Exercises; 6.8. Solutions; 7. Programmable Logic Circuits; 7.1. General overview; 7.2. Programmable logic device; 7.3. Applications; 7.3.1. Implementation of logic functions. - 7.3.2. Two-bit adder. - Includes bibliographical references and index | ||
| 650 | 4 | |a Digital electronics | |
| 650 | 4 | |a Logic circuits | |
| 650 | 0 | 7 | |a Digitalelektronik |0 (DE-588)4260328-6 |2 gnd |9 rswk-swf |
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| 776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |z 978-1-84821-985-4 |
| 856 | 4 | 0 | |u https://onlinelibrary.wiley.com/doi/book/10.1002/9781119329756 |x Verlag |z URL des Erstveröffentlichers |3 Volltext |
| 912 | |a ZDB-35-WIC |a ebook | ||
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Datensatz im Suchindex
| _version_ | 1804176692621606912 |
|---|---|
| any_adam_object | |
| author | Ndjountche, Tertulien |
| author_facet | Ndjountche, Tertulien |
| author_role | aut |
| author_sort | Ndjountche, Tertulien |
| author_variant | t n tn |
| building | Verbundindex |
| bvnumber | BV043830572 |
| collection | ZDB-35-WIC ebook |
| ctrlnum | (ZDB-35-WIC)ocn957437228 (OCoLC)964685170 (DE-599)BVBBV043830572 |
| dewey-full | 621.39/5 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/5 |
| dewey-search | 621.39/5 |
| dewey-sort | 3621.39 15 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Electronic eBook |
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| id | DE-604.BV043830572 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-10T07:36:13Z |
| institution | BVB |
| isbn | 9781119329756 1119329752 9781119329763 1119329760 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-029241362 |
| oclc_num | 957437228 964685170 |
| open_access_boolean | |
| owner | DE-861 DE-83 |
| owner_facet | DE-861 DE-83 |
| physical | 1 Online-Ressource (x, 313 Seiten ) Diagramme |
| psigel | ZDB-35-WIC ebook UBG_PDA_WIC ZDB-35-WIC FRO_PDA_WIC ZDB-35-WIC UBG_PDA_WIC |
| publishDate | 2016 |
| publishDateSearch | 2016 |
| publishDateSort | 2016 |
| publisher | Iste Wiley |
| record_format | marc |
| spelling | Ndjountche, Tertulien Verfasser aut Digital electronics 2 sequential and arithmetic logic circuits Tertulien Ndjountche London Iste 2016 Hoboken, NJ Wiley 1 Online-Ressource (x, 313 Seiten ) Diagramme txt rdacontent c rdamedia cr rdacarrier Cover ; Title Page; Copyright ; Contents; Preface; P.1. Summary; P.2. The reader; 1. Latch and Flip-Flop; 1.1. Introduction; 1.2. General overview; 1.2.1. SR latch; 1.2.2. \bar{S} \bar{R} latch; 1.2.3. Application: switch debouncing; 1.3. Gated SR latch; 1.3.1. Implementation based on an SR latch; 1.3.2. Implementation based on an \bar{S} \bar{R} latch; 1.4. Gated D latch; 1.5. Basic JK flip-flop; 1.6. T flip-flop; 1.7. Master-slave and edge-triggered flip-flop; 1.7.1. Master-slave flip-flop; 1.7.2. Edge-triggered flip-flop; 1.8. Flip-flops with asynchronous inputs 1.9. Operational characteristics of flip-flops1.10. Exercises; 1.11. Solutions; 2. Binary Counters; 2.1. Introduction; 2.2. Modulo 4 counter; 2.3. Modulo 8 counter; 2.4. Modulo 16 counter; 2.4.1. Modulo 10 counter; 2.5. Counter with parallel load; 2.6. Down counter; 2.7. Synchronous reversible counter; 2.8. Decoding a down counter; 2.9. Exercises; 2.10. Solutions; 3. Shift Register; 3.1. Introduction; 3.2. Serial-in shift register; 3.3. Parallel-in shift register; 3.4. Bidirectional shift register; 3.5. Register file; 3.6. Shift register based counter; 3.6.1. Ring counter 3.6.2. Johnson counter3.6.3. Linear feedback counter; 3.7. Exercises; 3.8. Solutions; 4. Arithmetic and Logic Circuits; 4.1. Introduction; 4.2. Adder; 4.2.1. Half adder; 4.2.2. Full adder; 4.2.3. Ripple-carry adder; 4.2.4. Carry-lookahead adder; 4.2.5. Carry-select adder; 4.2.6. Carry-skip adder; 4.3. Comparator; 4.4. Arithmetic and logic unit; 4.5. Multiplier; 4.5.1. Multiplier of 2-bit unsigned numbers; 4.5.2. Multiplier of 4-bit unsigned numbers; 4.5.3. Multiplier for signed numbers; 4.6. Divider; 4.7. Exercises; 4.8. Solutions; 5. Digital Integrated Circuit Technology; 5.1. Introduction 5.2. Characteristics of the technologies5.2.1. Supply voltage; 5.2.2. Logic levels; 5.2.3. Immunity to noise; 5.2.4. Propagation delay; 5.2.5. Electric power consumption; 5.2.6. Fan-out or load factor; 5.3. TTL logic family; 5.3.1. Bipolar junction transistor; 5.3.2. TTL NAND gate; 5.3.3. Integrated TTL circuit; 5.4. CMOS logic family; 5.4.1. MOSFET transistor; 5.4.2. CMOS logic gates; 5.5. Open drain logic gates; 5.5.1. Three-state buffer; 5.5.2. CMOS integrated circuit; 5.6. Other logic families; 5.7. Interfacing circuits of different technologies; 5.8. Exercises; 5.9. Solutions 6. Semiconductor Memory6.1. Introduction; 6.2. Memory organization; 6.3. Operation of a memory; 6.4. Types of memory; 6.4.1. Non-volatile memory; 6.4.2. Volatile memories; 6.4.3. Characteristics of the different memory types; 6.5. Applications; 6.5.1. Memory organization; 6.5.2. Applications; 6.6. Other types of memory; 6.6.1. Ferromagnetic RAM; 6.6.2. Content-addressable memory; 6.6.3. Sequential access memory; 6.7. Exercises; 6.8. Solutions; 7. Programmable Logic Circuits; 7.1. General overview; 7.2. Programmable logic device; 7.3. Applications; 7.3.1. Implementation of logic functions. - 7.3.2. Two-bit adder. - Includes bibliographical references and index Digital electronics Logic circuits Digitalelektronik (DE-588)4260328-6 gnd rswk-swf Digitalelektronik (DE-588)4260328-6 s DE-604 Erscheint auch als Druck-Ausgabe 978-1-84821-985-4 https://onlinelibrary.wiley.com/doi/book/10.1002/9781119329756 Verlag URL des Erstveröffentlichers Volltext |
| spellingShingle | Ndjountche, Tertulien Digital electronics 2 sequential and arithmetic logic circuits Digital electronics Logic circuits Digitalelektronik (DE-588)4260328-6 gnd |
| subject_GND | (DE-588)4260328-6 |
| title | Digital electronics 2 sequential and arithmetic logic circuits |
| title_auth | Digital electronics 2 sequential and arithmetic logic circuits |
| title_exact_search | Digital electronics 2 sequential and arithmetic logic circuits |
| title_full | Digital electronics 2 sequential and arithmetic logic circuits Tertulien Ndjountche |
| title_fullStr | Digital electronics 2 sequential and arithmetic logic circuits Tertulien Ndjountche |
| title_full_unstemmed | Digital electronics 2 sequential and arithmetic logic circuits Tertulien Ndjountche |
| title_short | Digital electronics 2 |
| title_sort | digital electronics 2 sequential and arithmetic logic circuits |
| title_sub | sequential and arithmetic logic circuits |
| topic | Digital electronics Logic circuits Digitalelektronik (DE-588)4260328-6 gnd |
| topic_facet | Digital electronics Logic circuits Digitalelektronik |
| url | https://onlinelibrary.wiley.com/doi/book/10.1002/9781119329756 |
| work_keys_str_mv | AT ndjountchetertulien digitalelectronics2sequentialandarithmeticlogiccircuits |