APA (7th ed.) Citation

Seligman, E., Schubert, T., & Kumar, M. V. A. K. (2015). Formal verification: An essential toolkit for modern VLSI design. Elsevier, Morgan Kaufmann.

Chicago Style (17th ed.) Citation

Seligman, Erik, Tom Schubert, and M. V. Achutha Kiran Kumar. Formal Verification: An Essential Toolkit for Modern VLSI Design. Amsterdam: Elsevier, Morgan Kaufmann, 2015.

MLA (9th ed.) Citation

Seligman, Erik, et al. Formal Verification: An Essential Toolkit for Modern VLSI Design. Elsevier, Morgan Kaufmann, 2015.