Low power high speed CMOS multiplexer design:
Gespeichert in:
Format: | Elektronisch E-Book |
---|---|
Sprache: | English |
Veröffentlicht: |
Hauppauge, New York
Nova Science Publisher's, Inc.
[2014]
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Schriftenreihe: | Electrical engineering developments series
|
Schlagworte: | |
Online-Zugang: | FAW01 FAW02 |
Beschreibung: | Includes index Print version record |
Beschreibung: | 1 online resource |
ISBN: | 9781634636209 1634636201 9781634633222 1634633229 |
Internformat
MARC
LEADER | 00000nmm a2200000zc 4500 | ||
---|---|---|---|
001 | BV043784021 | ||
003 | DE-604 | ||
005 | 00000000000000.0 | ||
007 | cr|uuu---uuuuu | ||
008 | 160920s2014 |||| o||u| ||||||eng d | ||
020 | |a 9781634636209 |9 978-1-63463-620-9 | ||
020 | |a 1634636201 |9 1-63463-620-1 | ||
020 | |a 9781634633222 |9 978-1-63463-322-2 | ||
020 | |a 1634633229 |9 1-63463-322-9 | ||
035 | |a (ZDB-4-EBA)ocn902847098 | ||
035 | |a (OCoLC)902847098 | ||
035 | |a (DE-599)BVBBV043784021 | ||
040 | |a DE-604 |b ger |e rda | ||
041 | 0 | |a eng | |
049 | |a DE-1046 |a DE-1047 | ||
082 | 0 | |a 621.3815/37 |2 23 | |
245 | 1 | 0 | |a Low power high speed CMOS multiplexer design |c editors, Shyam Akashe and Khusbou Mishra |
264 | 1 | |a Hauppauge, New York |b Nova Science Publisher's, Inc. |c [2014] | |
300 | |a 1 online resource | ||
336 | |b txt |2 rdacontent | ||
337 | |b c |2 rdamedia | ||
338 | |b cr |2 rdacarrier | ||
490 | 0 | |a Electrical engineering developments series | |
500 | |a Includes index | ||
500 | |a Print version record | ||
505 | 8 | |a Scaling issue of recent design of CMOS device nanotechnology -- Impact of techniques in nanoscale CMOS technology -- Various logic styles of multiplexer for low power designs -- Leakage reduction techniques on multiplexer circuit for the system SOC design -- Impact of GDI and FINFET on multiplexer | |
505 | 8 | |a This book proposes the reversible logic Multiplexer and also demarcates between reversible and irreversible logic Multiplexers. For power reduction in future computing technologies, reversible logic is a very productive approach of logic synthesis. The purpose of this book is to reduce power and area of 2:1 MUX, 4:1 MUX and reversible logic while maintaining the viable performance. The diverse configurations are designed using different topologies of 2:1 MUX and 4:1 MUX such as CMOS based MUX, transmission gate and pass transistor. The editors propose a new application of GDI (Gate-Diffusion I. | |
650 | 7 | |a TECHNOLOGY & ENGINEERING / Mechanical |2 bisacsh | |
650 | 7 | |a Electronic circuit design |2 fast | |
650 | 7 | |a Low voltage integrated circuits |2 fast | |
650 | 7 | |a Metal oxide semiconductors, Complementary |2 fast | |
650 | 7 | |a Mixing circuits |2 fast | |
650 | 7 | |a Multiplexing |2 fast | |
650 | 7 | |a Switching circuits |2 fast | |
650 | 4 | |a Electronic circuit design | |
650 | 4 | |a Low voltage integrated circuits | |
650 | 4 | |a Metal oxide semiconductors, Complementary | |
650 | 4 | |a Mixing circuits | |
650 | 4 | |a Multiplexing | |
650 | 4 | |a Switching circuits | |
650 | 4 | |a Switching circuits |a Mixing circuits |a Multiplexing |a Electronic circuit design |a Metal oxide semiconductors, Complementary |a Low voltage integrated circuits | |
700 | 1 | |a Akashe, Shyam |e Sonstige |4 oth | |
700 | 1 | |a Mishra, Khusbou |e Sonstige |4 oth | |
776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |a Low power high speed CMOS multiplexer design |
912 | |a ZDB-4-EBA | ||
999 | |a oai:aleph.bib-bvb.de:BVB01-029195081 | ||
966 | e | |u http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=948055 |l FAW01 |p ZDB-4-EBA |q FAW_PDA_EBA |x Aggregator |3 Volltext | |
966 | e | |u http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=948055 |l FAW02 |p ZDB-4-EBA |q FAW_PDA_EBA |x Aggregator |3 Volltext |
Datensatz im Suchindex
_version_ | 1804176616363917312 |
---|---|
any_adam_object | |
building | Verbundindex |
bvnumber | BV043784021 |
collection | ZDB-4-EBA |
contents | Scaling issue of recent design of CMOS device nanotechnology -- Impact of techniques in nanoscale CMOS technology -- Various logic styles of multiplexer for low power designs -- Leakage reduction techniques on multiplexer circuit for the system SOC design -- Impact of GDI and FINFET on multiplexer This book proposes the reversible logic Multiplexer and also demarcates between reversible and irreversible logic Multiplexers. For power reduction in future computing technologies, reversible logic is a very productive approach of logic synthesis. The purpose of this book is to reduce power and area of 2:1 MUX, 4:1 MUX and reversible logic while maintaining the viable performance. The diverse configurations are designed using different topologies of 2:1 MUX and 4:1 MUX such as CMOS based MUX, transmission gate and pass transistor. The editors propose a new application of GDI (Gate-Diffusion I. |
ctrlnum | (ZDB-4-EBA)ocn902847098 (OCoLC)902847098 (DE-599)BVBBV043784021 |
dewey-full | 621.3815/37 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.3815/37 |
dewey-search | 621.3815/37 |
dewey-sort | 3621.3815 237 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
format | Electronic eBook |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>03277nmm a2200601zc 4500</leader><controlfield tag="001">BV043784021</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">160920s2014 |||| o||u| ||||||eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781634636209</subfield><subfield code="9">978-1-63463-620-9</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">1634636201</subfield><subfield code="9">1-63463-620-1</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781634633222</subfield><subfield code="9">978-1-63463-322-2</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">1634633229</subfield><subfield code="9">1-63463-322-9</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(ZDB-4-EBA)ocn902847098</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)902847098</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV043784021</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rda</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-1046</subfield><subfield code="a">DE-1047</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.3815/37</subfield><subfield code="2">23</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Low power high speed CMOS multiplexer design</subfield><subfield code="c">editors, Shyam Akashe and Khusbou Mishra</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Hauppauge, New York</subfield><subfield code="b">Nova Science Publisher's, Inc.</subfield><subfield code="c">[2014]</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 online resource</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="0" ind2=" "><subfield code="a">Electrical engineering developments series</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Includes index</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Print version record</subfield></datafield><datafield tag="505" ind1="8" ind2=" "><subfield code="a">Scaling issue of recent design of CMOS device nanotechnology -- Impact of techniques in nanoscale CMOS technology -- Various logic styles of multiplexer for low power designs -- Leakage reduction techniques on multiplexer circuit for the system SOC design -- Impact of GDI and FINFET on multiplexer</subfield></datafield><datafield tag="505" ind1="8" ind2=" "><subfield code="a">This book proposes the reversible logic Multiplexer and also demarcates between reversible and irreversible logic Multiplexers. For power reduction in future computing technologies, reversible logic is a very productive approach of logic synthesis. The purpose of this book is to reduce power and area of 2:1 MUX, 4:1 MUX and reversible logic while maintaining the viable performance. The diverse configurations are designed using different topologies of 2:1 MUX and 4:1 MUX such as CMOS based MUX, transmission gate and pass transistor. The editors propose a new application of GDI (Gate-Diffusion I.</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">TECHNOLOGY & ENGINEERING / Mechanical</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Electronic circuit design</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Low voltage integrated circuits</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Metal oxide semiconductors, Complementary</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Mixing circuits</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Multiplexing</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Switching circuits</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic circuit design</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Low voltage integrated circuits</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Metal oxide semiconductors, Complementary</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Mixing circuits</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Multiplexing</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Switching circuits</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Switching circuits</subfield><subfield code="a">Mixing circuits</subfield><subfield code="a">Multiplexing</subfield><subfield code="a">Electronic circuit design</subfield><subfield code="a">Metal oxide semiconductors, Complementary</subfield><subfield code="a">Low voltage integrated circuits</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Akashe, Shyam</subfield><subfield code="e">Sonstige</subfield><subfield code="4">oth</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Mishra, Khusbou</subfield><subfield code="e">Sonstige</subfield><subfield code="4">oth</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe</subfield><subfield code="a">Low power high speed CMOS multiplexer design</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-4-EBA</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-029195081</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=948055</subfield><subfield code="l">FAW01</subfield><subfield code="p">ZDB-4-EBA</subfield><subfield code="q">FAW_PDA_EBA</subfield><subfield code="x">Aggregator</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=948055</subfield><subfield code="l">FAW02</subfield><subfield code="p">ZDB-4-EBA</subfield><subfield code="q">FAW_PDA_EBA</subfield><subfield code="x">Aggregator</subfield><subfield code="3">Volltext</subfield></datafield></record></collection> |
id | DE-604.BV043784021 |
illustrated | Not Illustrated |
indexdate | 2024-07-10T07:35:01Z |
institution | BVB |
isbn | 9781634636209 1634636201 9781634633222 1634633229 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-029195081 |
oclc_num | 902847098 |
open_access_boolean | |
owner | DE-1046 DE-1047 |
owner_facet | DE-1046 DE-1047 |
physical | 1 online resource |
psigel | ZDB-4-EBA ZDB-4-EBA FAW_PDA_EBA |
publishDate | 2014 |
publishDateSearch | 2014 |
publishDateSort | 2014 |
publisher | Nova Science Publisher's, Inc. |
record_format | marc |
series2 | Electrical engineering developments series |
spelling | Low power high speed CMOS multiplexer design editors, Shyam Akashe and Khusbou Mishra Hauppauge, New York Nova Science Publisher's, Inc. [2014] 1 online resource txt rdacontent c rdamedia cr rdacarrier Electrical engineering developments series Includes index Print version record Scaling issue of recent design of CMOS device nanotechnology -- Impact of techniques in nanoscale CMOS technology -- Various logic styles of multiplexer for low power designs -- Leakage reduction techniques on multiplexer circuit for the system SOC design -- Impact of GDI and FINFET on multiplexer This book proposes the reversible logic Multiplexer and also demarcates between reversible and irreversible logic Multiplexers. For power reduction in future computing technologies, reversible logic is a very productive approach of logic synthesis. The purpose of this book is to reduce power and area of 2:1 MUX, 4:1 MUX and reversible logic while maintaining the viable performance. The diverse configurations are designed using different topologies of 2:1 MUX and 4:1 MUX such as CMOS based MUX, transmission gate and pass transistor. The editors propose a new application of GDI (Gate-Diffusion I. TECHNOLOGY & ENGINEERING / Mechanical bisacsh Electronic circuit design fast Low voltage integrated circuits fast Metal oxide semiconductors, Complementary fast Mixing circuits fast Multiplexing fast Switching circuits fast Electronic circuit design Low voltage integrated circuits Metal oxide semiconductors, Complementary Mixing circuits Multiplexing Switching circuits Switching circuits Mixing circuits Multiplexing Electronic circuit design Metal oxide semiconductors, Complementary Low voltage integrated circuits Akashe, Shyam Sonstige oth Mishra, Khusbou Sonstige oth Erscheint auch als Druck-Ausgabe Low power high speed CMOS multiplexer design |
spellingShingle | Low power high speed CMOS multiplexer design Scaling issue of recent design of CMOS device nanotechnology -- Impact of techniques in nanoscale CMOS technology -- Various logic styles of multiplexer for low power designs -- Leakage reduction techniques on multiplexer circuit for the system SOC design -- Impact of GDI and FINFET on multiplexer This book proposes the reversible logic Multiplexer and also demarcates between reversible and irreversible logic Multiplexers. For power reduction in future computing technologies, reversible logic is a very productive approach of logic synthesis. The purpose of this book is to reduce power and area of 2:1 MUX, 4:1 MUX and reversible logic while maintaining the viable performance. The diverse configurations are designed using different topologies of 2:1 MUX and 4:1 MUX such as CMOS based MUX, transmission gate and pass transistor. The editors propose a new application of GDI (Gate-Diffusion I. TECHNOLOGY & ENGINEERING / Mechanical bisacsh Electronic circuit design fast Low voltage integrated circuits fast Metal oxide semiconductors, Complementary fast Mixing circuits fast Multiplexing fast Switching circuits fast Electronic circuit design Low voltage integrated circuits Metal oxide semiconductors, Complementary Mixing circuits Multiplexing Switching circuits Switching circuits Mixing circuits Multiplexing Electronic circuit design Metal oxide semiconductors, Complementary Low voltage integrated circuits |
title | Low power high speed CMOS multiplexer design |
title_auth | Low power high speed CMOS multiplexer design |
title_exact_search | Low power high speed CMOS multiplexer design |
title_full | Low power high speed CMOS multiplexer design editors, Shyam Akashe and Khusbou Mishra |
title_fullStr | Low power high speed CMOS multiplexer design editors, Shyam Akashe and Khusbou Mishra |
title_full_unstemmed | Low power high speed CMOS multiplexer design editors, Shyam Akashe and Khusbou Mishra |
title_short | Low power high speed CMOS multiplexer design |
title_sort | low power high speed cmos multiplexer design |
topic | TECHNOLOGY & ENGINEERING / Mechanical bisacsh Electronic circuit design fast Low voltage integrated circuits fast Metal oxide semiconductors, Complementary fast Mixing circuits fast Multiplexing fast Switching circuits fast Electronic circuit design Low voltage integrated circuits Metal oxide semiconductors, Complementary Mixing circuits Multiplexing Switching circuits Switching circuits Mixing circuits Multiplexing Electronic circuit design Metal oxide semiconductors, Complementary Low voltage integrated circuits |
topic_facet | TECHNOLOGY & ENGINEERING / Mechanical Electronic circuit design Low voltage integrated circuits Metal oxide semiconductors, Complementary Mixing circuits Multiplexing Switching circuits Switching circuits Mixing circuits Multiplexing Electronic circuit design Metal oxide semiconductors, Complementary Low voltage integrated circuits |
work_keys_str_mv | AT akasheshyam lowpowerhighspeedcmosmultiplexerdesign AT mishrakhusbou lowpowerhighspeedcmosmultiplexerdesign |