Research infrastructures for hardware accelerators:
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
[San Rafael, California]
Morgan & Claypool Publishers
2016
|
Schriftenreihe: | Synthesis lectures in computer architecture
Lecture Number 34 |
Schlagworte: | |
Online-Zugang: | UER01 |
Beschreibung: | Description based on online resource; title from PDF title page (ebrary, viewed December 16, 2015) |
Beschreibung: | 1 online resource (101 pages) illustrations (some color) |
ISBN: | 9781627058315 9781627058322 |
Internformat
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650 | 4 | |a Microprocessors |x Design and construction | |
650 | 4 | |a Microprocessors |x Programming | |
700 | 1 | |a Brooks, David |4 aut | |
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Datensatz im Suchindex
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any_adam_object | |
author | Shao, Yakun Sophia Brooks, David |
author_facet | Shao, Yakun Sophia Brooks, David |
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author_sort | Shao, Yakun Sophia |
author_variant | y s s ys yss d b db |
building | Verbundindex |
bvnumber | BV043734754 |
collection | ZDB-38-EBR |
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dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.3916 |
dewey-search | 621.3916 |
dewey-sort | 3621.3916 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
format | Electronic eBook |
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id | DE-604.BV043734754 |
illustrated | Illustrated |
indexdate | 2024-07-10T07:33:42Z |
institution | BVB |
isbn | 9781627058315 9781627058322 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-029146564 |
oclc_num | 957675819 |
open_access_boolean | |
owner | DE-29 |
owner_facet | DE-29 |
physical | 1 online resource (101 pages) illustrations (some color) |
psigel | ZDB-38-EBR ZDB-38-EBR UER_PDA_EBR_Kauf |
publishDate | 2016 |
publishDateSearch | 2016 |
publishDateSort | 2016 |
publisher | Morgan & Claypool Publishers |
record_format | marc |
series2 | Synthesis lectures in computer architecture |
spelling | Shao, Yakun Sophia Verfasser aut Research infrastructures for hardware accelerators Yakun Sophia Shao and David Brooks [San Rafael, California] Morgan & Claypool Publishers 2016 © 2016 1 online resource (101 pages) illustrations (some color) txt rdacontent c rdamedia cr rdacarrier Synthesis lectures in computer architecture Lecture Number 34 Description based on online resource; title from PDF title page (ebrary, viewed December 16, 2015) Microprocessors Design and construction Microprocessors Programming Brooks, David aut Erscheint auch als Druck-Ausgabe Shao, Yakun Sophia Research infrastructures for hardware accelerators |
spellingShingle | Shao, Yakun Sophia Brooks, David Research infrastructures for hardware accelerators Microprocessors Design and construction Microprocessors Programming |
title | Research infrastructures for hardware accelerators |
title_auth | Research infrastructures for hardware accelerators |
title_exact_search | Research infrastructures for hardware accelerators |
title_full | Research infrastructures for hardware accelerators Yakun Sophia Shao and David Brooks |
title_fullStr | Research infrastructures for hardware accelerators Yakun Sophia Shao and David Brooks |
title_full_unstemmed | Research infrastructures for hardware accelerators Yakun Sophia Shao and David Brooks |
title_short | Research infrastructures for hardware accelerators |
title_sort | research infrastructures for hardware accelerators |
topic | Microprocessors Design and construction Microprocessors Programming |
topic_facet | Microprocessors Design and construction Microprocessors Programming |
work_keys_str_mv | AT shaoyakunsophia researchinfrastructuresforhardwareaccelerators AT brooksdavid researchinfrastructuresforhardwareaccelerators |