Failure-Tolerant Computer Design:
Failure-Tolerant Computer Design focuses on the use of redundancy theory in improving the reliability of computers. The book first offers information on redundancy theory and limit theorems. Discussions focus on applications in determining the optimum placement of restoring organs; time asymptotes f...
Gespeichert in:
1. Verfasser: | |
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Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
Kent
Elsevier Science
2014
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Schlagworte: | |
Online-Zugang: | FAW01 |
Zusammenfassung: | Failure-Tolerant Computer Design focuses on the use of redundancy theory in improving the reliability of computers. The book first offers information on redundancy theory and limit theorems. Discussions focus on applications in determining the optimum placement of restoring organs; time asymptotes for log failure probability for exponential survival probability; reliability of multiple-function system with paralleled individual units; and basic concepts for making reliable computers out of unreliable parts. The text then examines decision theory in redundant systems and adaptive decision elements. The publication examines the interconnection structure for redundant logic and redundant relay theory. Topics include Moore-Shannon limit theorem; systematic groupings of inputs in single-layer error-correcting interwoven redundant logic; interwoven logic with alternating-layer error correction; and interwoven logic with single-layer error correction. The book also elaborates on transition analyses in reliability theory, including Markov chain theory and probability bounds in Markov chains having many states or inexactly known transition matrices. The manuscript is a vital source of data for engineers and researchers interested in failure-tolerant computer design |
Beschreibung: | Description based on publisher supplied metadata and other sources |
Beschreibung: | 1 online resource (257 pages) |
ISBN: | 9781483263472 9781483231792 |
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Datensatz im Suchindex
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any_adam_object | |
author | Pierce, William H. |
author_facet | Pierce, William H. |
author_role | aut |
author_sort | Pierce, William H. |
author_variant | w h p wh whp |
building | Verbundindex |
bvnumber | BV043616842 |
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dewey-full | 510.78 |
dewey-hundreds | 500 - Natural sciences and mathematics |
dewey-ones | 510 - Mathematics |
dewey-raw | 510.78 |
dewey-search | 510.78 |
dewey-sort | 3510.78 |
dewey-tens | 510 - Mathematics |
discipline | Mathematik |
format | Electronic eBook |
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id | DE-604.BV043616842 |
illustrated | Not Illustrated |
indexdate | 2024-07-10T07:30:55Z |
institution | BVB |
isbn | 9781483263472 9781483231792 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-029030901 |
oclc_num | 898769034 |
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publishDate | 2014 |
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publisher | Elsevier Science |
record_format | marc |
spelling | Pierce, William H. Verfasser aut Failure-Tolerant Computer Design Kent Elsevier Science 2014 © 1965 1 online resource (257 pages) txt rdacontent c rdamedia cr rdacarrier Description based on publisher supplied metadata and other sources Failure-Tolerant Computer Design focuses on the use of redundancy theory in improving the reliability of computers. The book first offers information on redundancy theory and limit theorems. Discussions focus on applications in determining the optimum placement of restoring organs; time asymptotes for log failure probability for exponential survival probability; reliability of multiple-function system with paralleled individual units; and basic concepts for making reliable computers out of unreliable parts. The text then examines decision theory in redundant systems and adaptive decision elements. The publication examines the interconnection structure for redundant logic and redundant relay theory. Topics include Moore-Shannon limit theorem; systematic groupings of inputs in single-layer error-correcting interwoven redundant logic; interwoven logic with alternating-layer error correction; and interwoven logic with single-layer error correction. The book also elaborates on transition analyses in reliability theory, including Markov chain theory and probability bounds in Markov chains having many states or inexactly known transition matrices. The manuscript is a vital source of data for engineers and researchers interested in failure-tolerant computer design Electronic digital computers -- Design and construction Error-correcting codes (Information theory) Computer (DE-588)4070083-5 gnd rswk-swf Fehlertoleranz (DE-588)4123192-2 gnd rswk-swf Computer (DE-588)4070083-5 s Fehlertoleranz (DE-588)4123192-2 s 1\p DE-604 Erscheint auch als Druck-Ausgabe Pierce, William H . Failure-Tolerant Computer Design 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
spellingShingle | Pierce, William H. Failure-Tolerant Computer Design Electronic digital computers -- Design and construction Error-correcting codes (Information theory) Computer (DE-588)4070083-5 gnd Fehlertoleranz (DE-588)4123192-2 gnd |
subject_GND | (DE-588)4070083-5 (DE-588)4123192-2 |
title | Failure-Tolerant Computer Design |
title_auth | Failure-Tolerant Computer Design |
title_exact_search | Failure-Tolerant Computer Design |
title_full | Failure-Tolerant Computer Design |
title_fullStr | Failure-Tolerant Computer Design |
title_full_unstemmed | Failure-Tolerant Computer Design |
title_short | Failure-Tolerant Computer Design |
title_sort | failure tolerant computer design |
topic | Electronic digital computers -- Design and construction Error-correcting codes (Information theory) Computer (DE-588)4070083-5 gnd Fehlertoleranz (DE-588)4123192-2 gnd |
topic_facet | Electronic digital computers -- Design and construction Error-correcting codes (Information theory) Computer Fehlertoleranz |
work_keys_str_mv | AT piercewilliamh failuretolerantcomputerdesign |