Heterogeneous reconfigurable processors for real-time baseband processing: from algorithm to architecture
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Cham
Springer International Publishing
[2016]
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| Schlagworte: | |
| Online-Zugang: | BTU01 FAB01 FAW01 FHA01 FHI01 FHN01 FHR01 FKE01 FRO01 FWS01 FWS02 UBY01 Volltext Abstract Inhaltsverzeichnis |
| Beschreibung: | 1 Online Ressource (XIV, 195 Seiten) |
| ISBN: | 9783319240046 |
| DOI: | 10.1007/978-3-319-24004-6 |
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Datensatz im Suchindex
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| adam_text | HETEROGENEOUS RECONFIGURABLE PROCESSORS FOR REAL-TIME BASEBAND
PROCESSING
/ ZHANG, CHENXIN
: 2016
ABSTRACT / INHALTSTEXT
THIS BOOK FOCUSES ON DOMAIN-SPECIFIC HETEROGENEOUS RECONFIGURABLE
ARCHITECTURES, DEMONSTRATING FOR READERS A COMPUTING PLATFORM WHICH IS
FLEXIBLE ENOUGH TO SUPPORT MULTIPLE STANDARDS, MULTIPLE MODES, AND
MULTIPLE ALGORITHMS. THE CONTENT IS MULTI-DISCIPLINARY, COVERING AREAS
OF WIRELESS COMMUNICATION, COMPUTING ARCHITECTURE, AND CIRCUIT DESIGN.
THE PLATFORM DESCRIBED PROVIDES REAL-TIME PROCESSING CAPABILITY WITH
REASONABLE IMPLEMENTATION COST, ACHIEVING BALANCED TRADE-OFFS AMONG
FLEXIBILITY, PERFORMANCE, AND HARDWARE COSTS. THE AUTHORS DISCUSS
EFFICIENT DESIGN METHODS FOR WIRELESS COMMUNICATION PROCESSING
PLATFORMS, FROM BOTH AN ALGORITHM AND ARCHITECTURE DESIGN PERSPECTIVE.
COVERAGE ALSO INCLUDES COMPUTING PLATFORMS FOR DIFFERENT WIRELESS
TECHNOLOGIES AND STANDARDS, INCLUDING MIMO, OFDM, MASSIVE MIMO, DVB,
WLAN, LTE/LTE-A, AND 5G. •DISCUSSES RECONFIGURABLE ARCHITECTURES,
INCLUDING HARDWARE BUILDING BLOCKS SUCH AS PROCESSING ELEMENTS, MEMORY
SUB-SYSTEMS, NETWORK-ON-CHIP (NOC), AND DYNAMIC HARDWARE
RECONFIGURATION; •DESCRIBES A UNIQUE DESIGN AND OPTIMIZATION
METHODOLOGY, APPLIED TO DIFFERENT AREAS AND LEVELS, INCLUDING
COMMUNICATION THEORY, HARDWARE IMPLEMENTATION, AND SOFTWARE SUPPORT;
•DEMONSTRATES DESIGN TRADE-OFFS DURING DIFFERENT DEVELOPMENT PHASES
AND ENABLES READERS TO APPLY SIMILAR TECHNIQUES TO VARIOUS APPLICATIONS
DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT.
HETEROGENEOUS RECONFIGURABLE PROCESSORS FOR REAL-TIME BASEBAND
PROCESSING
/ ZHANG, CHENXIN
: 2016
TABLE OF CONTENTS / INHALTSVERZEICHNIS
INTRODUCTION
DIGITAL HARDWARE PLATFORMS
DIGITAL BASEBAND PROCESSING
THE RECONFIGURABLE CELL ARRAY
MULTI-STANDARD DIGITAL FRONT-END PROCESSING
MULTI-TASK MIMO SIGNAL PROCESSING
FUTURE MULTI-USER MIMO SYSTEMS – A DISCUSSION
CONCLUSION.-
DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT.
|
| any_adam_object | 1 |
| author | Zhang, Chenxin |
| author_facet | Zhang, Chenxin |
| author_role | aut |
| author_sort | Zhang, Chenxin |
| author_variant | c z cz |
| building | Verbundindex |
| bvnumber | BV043407845 |
| collection | ZDB-2-ENG |
| ctrlnum | (OCoLC)936838504 (DE-599)BVBBV043407845 |
| dewey-full | 621.3815 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3815 |
| dewey-search | 621.3815 |
| dewey-sort | 3621.3815 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| doi_str_mv | 10.1007/978-3-319-24004-6 |
| format | Electronic eBook |
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| id | DE-604.BV043407845 |
| illustrated | Not Illustrated |
| indexdate | 2024-08-01T12:12:42Z |
| institution | BVB |
| isbn | 9783319240046 |
| language | English |
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| publishDate | 2016 |
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| spellingShingle | Zhang, Chenxin Heterogeneous reconfigurable processors for real-time baseband processing from algorithm to architecture Engineering Microprocessors Electronics Microelectronics Electronic circuits Circuits and Systems Processor Architectures Electronics and Microelectronics, Instrumentation Ingenieurwissenschaften |
| title | Heterogeneous reconfigurable processors for real-time baseband processing from algorithm to architecture |
| title_auth | Heterogeneous reconfigurable processors for real-time baseband processing from algorithm to architecture |
| title_exact_search | Heterogeneous reconfigurable processors for real-time baseband processing from algorithm to architecture |
| title_full | Heterogeneous reconfigurable processors for real-time baseband processing from algorithm to architecture Chenxin Zhang, Liang Liu, Viktor Öwall |
| title_fullStr | Heterogeneous reconfigurable processors for real-time baseband processing from algorithm to architecture Chenxin Zhang, Liang Liu, Viktor Öwall |
| title_full_unstemmed | Heterogeneous reconfigurable processors for real-time baseband processing from algorithm to architecture Chenxin Zhang, Liang Liu, Viktor Öwall |
| title_short | Heterogeneous reconfigurable processors for real-time baseband processing |
| title_sort | heterogeneous reconfigurable processors for real time baseband processing from algorithm to architecture |
| title_sub | from algorithm to architecture |
| topic | Engineering Microprocessors Electronics Microelectronics Electronic circuits Circuits and Systems Processor Architectures Electronics and Microelectronics, Instrumentation Ingenieurwissenschaften |
| topic_facet | Engineering Microprocessors Electronics Microelectronics Electronic circuits Circuits and Systems Processor Architectures Electronics and Microelectronics, Instrumentation Ingenieurwissenschaften |
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