Design through Verilog HDL:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Piscataway, NJ
IEEE Press
[2004]
|
| Schlagworte: | |
| Online-Zugang: | FRO01 UBG01 FHI01 FHN01 Volltext |
| Beschreibung: | Includes bibliographical references (pages 449-450) and index "A comprehensive resource on Verilog HDL for beginners and experts Large and complicated digital circuits can be incorporated into hardware by using Verilog, a hardware description language (HDL). A designer aspiring to master this versatile language must first become familiar with its constructs, practice their use in real applications, and apply them in combinations in order to be successful. Design Through Verilog HDL affords novices the opportunity to perform all of these tasks, while also offering seasoned professionals a comprehensive resource on this dynamic tool. Describing a design using Verilog is only half the story: writing test-benches, testing a design for all its desired functions, and how identifying and removing the faults remain significant challenges. Design Through Verilog HDL addresses each of these issues concisely and effectively. The authors discuss constructs through illustrative examples that are tested with popular simulation packages, ensuring the subject matter remains practically relevant. Other important topics covered include: Primitives; Gate and Net delays; Buffers CMOS switches; State machine design. Further, the authors focus on illuminating the differences between gate level, data flow, and behavioral styles of Verilog, a critical distinction for designers. The book's final chapters deal with advanced topics such as timescales, parameters and related constructs, queues, and switch level design. Each chapter concludes with exercises that both ensure readers have mastered the present material and stimulate readers to explore avenues of their own choosing. Written and assembled in a paced, logical manner, Design Through Verilog HDL provides professionals, graduate students, and advanced undergraduates with a one-of-a-kind resource."--Publisher's description |
| Beschreibung: | 1 Online-Ressource (xii, 455 pages) |
| ISBN: | 9780471723004 0471723002 1280557079 9781280557071 |
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Datensatz im Suchindex
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| author | Padmanabhan, Tattamangalam R. |
| author_facet | Padmanabhan, Tattamangalam R. |
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| author_sort | Padmanabhan, Tattamangalam R. |
| author_variant | t r p tr trp |
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| dewey-full | 621.39/2 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/2 |
| dewey-search | 621.39/2 |
| dewey-sort | 3621.39 12 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Electronic eBook |
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| illustrated | Not Illustrated |
| indexdate | 2024-07-10T07:24:29Z |
| institution | BVB |
| isbn | 9780471723004 0471723002 1280557079 9781280557071 |
| language | English |
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| publisher | IEEE Press |
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| spelling | Padmanabhan, Tattamangalam R. Verfasser aut Design through Verilog HDL T.R. Padmanabhan, B. Bala Tripura Sundari Piscataway, NJ IEEE Press [2004] 1 Online-Ressource (xii, 455 pages) txt rdacontent c rdamedia cr rdacarrier Includes bibliographical references (pages 449-450) and index "A comprehensive resource on Verilog HDL for beginners and experts Large and complicated digital circuits can be incorporated into hardware by using Verilog, a hardware description language (HDL). A designer aspiring to master this versatile language must first become familiar with its constructs, practice their use in real applications, and apply them in combinations in order to be successful. Design Through Verilog HDL affords novices the opportunity to perform all of these tasks, while also offering seasoned professionals a comprehensive resource on this dynamic tool. Describing a design using Verilog is only half the story: writing test-benches, testing a design for all its desired functions, and how identifying and removing the faults remain significant challenges. Design Through Verilog HDL addresses each of these issues concisely and effectively. The authors discuss constructs through illustrative examples that are tested with popular simulation packages, ensuring the subject matter remains practically relevant. Other important topics covered include: Primitives; Gate and Net delays; Buffers CMOS switches; State machine design. Further, the authors focus on illuminating the differences between gate level, data flow, and behavioral styles of Verilog, a critical distinction for designers. The book's final chapters deal with advanced topics such as timescales, parameters and related constructs, queues, and switch level design. Each chapter concludes with exercises that both ensure readers have mastered the present material and stimulate readers to explore avenues of their own choosing. Written and assembled in a paced, logical manner, Design Through Verilog HDL provides professionals, graduate students, and advanced undergraduates with a one-of-a-kind resource."--Publisher's description Electrical and Electronics Engineering Verilog (Computer hardware description language) fast Verilog (langage de description de matériel informatique) ram Verilog (Computer hardware description language) Bala Tripura Sundari, B. Sonstige oth Erscheint auch als Druck-Ausgabe, Hardcover 978-0-471-44148-9 Erscheint auch als Druck-Ausgabe, Hardcover 0-471-44148-1 https://onlinelibrary.wiley.com/doi/book/10.1002/0471723002 Verlag URL des Erstveröffentlichers Volltext |
| spellingShingle | Padmanabhan, Tattamangalam R. Design through Verilog HDL Electrical and Electronics Engineering Verilog (Computer hardware description language) fast Verilog (langage de description de matériel informatique) ram Verilog (Computer hardware description language) |
| title | Design through Verilog HDL |
| title_auth | Design through Verilog HDL |
| title_exact_search | Design through Verilog HDL |
| title_full | Design through Verilog HDL T.R. Padmanabhan, B. Bala Tripura Sundari |
| title_fullStr | Design through Verilog HDL T.R. Padmanabhan, B. Bala Tripura Sundari |
| title_full_unstemmed | Design through Verilog HDL T.R. Padmanabhan, B. Bala Tripura Sundari |
| title_short | Design through Verilog HDL |
| title_sort | design through verilog hdl |
| topic | Electrical and Electronics Engineering Verilog (Computer hardware description language) fast Verilog (langage de description de matériel informatique) ram Verilog (Computer hardware description language) |
| topic_facet | Electrical and Electronics Engineering Verilog (Computer hardware description language) Verilog (langage de description de matériel informatique) |
| url | https://onlinelibrary.wiley.com/doi/book/10.1002/0471723002 |
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