IP cores design from specifications to production: modeling, verification, optimization, and protection
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Cham
Springer
[2016]
|
| Schriftenreihe: | Analog circuits and signal processing - ACSP
|
| Schlagworte: | |
| Online-Zugang: | BTU01 FAB01 FAW01 FHA01 FHI01 FHN01 FHR01 FKE01 FRO01 FWS01 FWS02 GEM01 UBY01 URL des Erstveröffentlichers Inhaltsverzeichnis Abstract |
| Beschreibung: | 1 Online-Ressource (ix, 154 Seiten) Illustrationen |
| ISBN: | 9783319220352 |
| DOI: | 10.1007/978-3-319-22035-2 |
Internformat
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Datensatz im Suchindex
| DE-BY-FWS_katkey | 591007 |
|---|---|
| _version_ | 1824554493153378305 |
| adam_text | IP CORES DESIGN FROM SPECIFICATIONS TO PRODUCTION
/ MOHAMED, KHALED SALAH
: 2016
TABLE OF CONTENTS / INHALTSVERZEICHNIS
1. INTRODUCTION
2. IP CORES DESIGN FROM SPECIFICATIONS TO PRODUCTION: MODELING,
VERIFICATION, OPTIMIZATION, AND PROTECTION
3. ANALYZING THE TRADE-OFF BETWEEN DIFFERENT MEMORY CORES AND
CONTROLLERS
4. SOC BUSES AND PERIPHERALS: FEATURES AND ARCHITECTURES
5. VERILOG FOR IMPLEMENTATION AND VERIFICATION
6. NEW TRENDS IN SOC VERIFICATION: UVM, BUG LOCALIZATION,
SCAN-CHAIN-BASED METHODOLOGY, GA-BASED TEST GENERATION
7. CONCLUSIONS
DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT.
IP CORES DESIGN FROM SPECIFICATIONS TO PRODUCTION
/ MOHAMED, KHALED SALAH
: 2016
ABSTRACT / INHALTSTEXT
THIS BOOK DESCRIBES THE LIFE CYCLE PROCESS OF IP CORES, FROM
SPECIFICATION TO PRODUCTION, INCLUDING IP MODELING, VERIFICATION,
OPTIMIZATION, AND PROTECTION. VARIOUS TRADE-OFFS IN THE DESIGN PROCESS
ARE DISCUSSED, INCLUDING THOSE ASSOCIATED WITH MANY OF THE MOST COMMON
MEMORY CORES, CONTROLLER IPS AND SYSTEM-ON-CHIP (SOC) BUSES. READERS
WILL ALSO BENEFIT FROM THE AUTHOR’S PRACTICAL COVERAGE OF NEW
VERIFICATION METHODOLOGIES. SUCH AS BUG LOCALIZATION, UVM, AND
SCAN-CHAIN. A SOC CASE STUDY IS PRESENTED TO COMPARE TRADITIONAL
VERIFICATION WITH THE NEW VERIFICATION METHODOLOGIES.
DISCUSSES THE ENTIRE LIFE CYCLE PROCESS OF IP CORES, FROM SPECIFICATION
TO PRODUCTION, INCLUDING IP MODELING, VERIFICATION, OPTIMIZATION, AND
PROTECTION; INTRODUCE A DEEP INTRODUCTION FOR VERILOG
FOR BOTH IMPLEMENTATION AND VERIFICATION POINT OF VIEW.
DEMONSTRATES HOW TO USE IP IN APPLICATIONS SUCH AS
MEMORY CONTROLLERS AND SOC BUSES. DESCRIBES A NEW
VERIFICATION METHODOLOGY CALLED BUG LOCALIZATION;
PRESENTS A NOVEL SCAN-CHAIN METHODOLOGY FOR RTL DEBUGGING;
ENABLES READERS TO EMPLOY UVM METHODOLOGY IN
STRAIGHTFORWARD, PRACTICAL TERMS
DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT.
|
| any_adam_object | 1 |
| author | Mohamed, Khaled Salah |
| author_facet | Mohamed, Khaled Salah |
| author_role | aut |
| author_sort | Mohamed, Khaled Salah |
| author_variant | k s m ks ksm |
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| bvnumber | BV043212021 |
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| dewey-full | 621.3815 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3815 |
| dewey-search | 621.3815 |
| dewey-sort | 3621.3815 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| doi_str_mv | 10.1007/978-3-319-22035-2 |
| format | Electronic eBook |
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| id | DE-604.BV043212021 |
| illustrated | Not Illustrated |
| indexdate | 2025-02-20T06:52:38Z |
| institution | BVB |
| isbn | 9783319220352 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-028635159 |
| oclc_num | 920969141 |
| open_access_boolean | |
| owner | DE-1043 DE-Aug4 DE-573 DE-859 DE-863 DE-BY-FWS DE-92 DE-862 DE-BY-FWS DE-898 DE-BY-UBR DE-634 DE-1046 DE-861 DE-M382 DE-706 |
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| physical | 1 Online-Ressource (ix, 154 Seiten) Illustrationen |
| psigel | ZDB-2-ENG ZDB-2-ENG_2016 |
| publishDate | 2016 |
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| series2 | Analog circuits and signal processing - ACSP |
| spellingShingle | Mohamed, Khaled Salah IP cores design from specifications to production modeling, verification, optimization, and protection Engineering Microprocessors Electronics Microelectronics Electronic circuits Circuits and Systems Processor Architectures Electronics and Microelectronics, Instrumentation Ingenieurwissenschaften |
| title | IP cores design from specifications to production modeling, verification, optimization, and protection |
| title_auth | IP cores design from specifications to production modeling, verification, optimization, and protection |
| title_exact_search | IP cores design from specifications to production modeling, verification, optimization, and protection |
| title_full | IP cores design from specifications to production modeling, verification, optimization, and protection Khaled Salah Mohamed |
| title_fullStr | IP cores design from specifications to production modeling, verification, optimization, and protection Khaled Salah Mohamed |
| title_full_unstemmed | IP cores design from specifications to production modeling, verification, optimization, and protection Khaled Salah Mohamed |
| title_short | IP cores design from specifications to production |
| title_sort | ip cores design from specifications to production modeling verification optimization and protection |
| title_sub | modeling, verification, optimization, and protection |
| topic | Engineering Microprocessors Electronics Microelectronics Electronic circuits Circuits and Systems Processor Architectures Electronics and Microelectronics, Instrumentation Ingenieurwissenschaften |
| topic_facet | Engineering Microprocessors Electronics Microelectronics Electronic circuits Circuits and Systems Processor Architectures Electronics and Microelectronics, Instrumentation Ingenieurwissenschaften |
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