Verfügbarkeit: Automated Technology for Verification and Analysis

Automated Technology for Verification and Analysis: 12th International Symposium, ATVA 2014, Sydney, NSW, Australia, November 3-7, 2014 : Proceedings

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Bibliographische Detailangaben
Weitere Verfasser:	Cassez, Franck 1967- (HerausgeberIn), Raskin, Jean-François (HerausgeberIn)
Format:	Elektronisch Tagungsbericht E-Book
Sprache:	English
Veröffentlicht:	Cham ; Heidelberg ; New York ; Dordrecht ; London Springer [2014]
Schriftenreihe:	Lecture Notes in Computer Science 8837
Schlagworte:	Computer science Computer communication systems Computer programming Software engineering Programming languages (Electronic computers) Computer logic Mathematical logic Computer Science Software Engineering Programming Techniques Computer Communication Networks Logics and Meanings of Programs Programming Languages, Compilers, Interpreters Mathematical Logic and Formal Languages Informatik Formale Methode Eingebettetes System Systemanalyse Verifikation CASHE Systemsynthese Systementwurf Konferenzschrift > 2014 > Sydney
Online-Zugang:	DE-703 DE-355 Volltext Inhaltsverzeichnis Abstract
Beschreibung:	1 Online Ressource (XXIII, 430 Seiten) Diagramme
ISBN:	9783319119366 9783319119359
DOI:	10.1007/978-3-319-11936-6

Internformat

MARC


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Datensatz im Suchindex

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adam_text	AUTOMATED TECHNOLOGY FOR VERIFICATION AND ANALYSIS / : 2014 TABLE OF CONTENTS / INHALTSVERZEICHNIS VERIFYING COMMUNICATING MULTI-PUSHDOWN SYSTEMS VIA SPLIT-WIDTH BOOSTER: AN ACCELERATION-BASED VERIFICATION FRAMEWORK FOR ARRAY PROGRAMS A BOUNDED MODEL CHECKER FOR SPARK PROGRAMS ACCELERATION OF AFFINE HYBRID TRANSFORMATIONS A MECHANIZED PROOF OF LOOP FREEDOM OF THE (UNTIMED) AODV ROUTING PROTOCOL QUANTITATIVE VERIFICATION OF WEIGHTED KRIPKE STRUCTURES FORMAL SAFETY ASSESSMENT VIA CONTRACT-BASED DESIGN VERIFICATION OF MARKOV DECISION PROCESSES USING LEARNING ALGORITHMS TEST COVERAGE ESTIMATION USING THRESHOLD ACCEPTING ON TIME WITH MINIMAL EXPECTED COST! FAST DEBUGGING OF PRISM MODELS ACME: AUTOMATA WITH COUNTERS, MONOIDS AND EQUIVALENCE (TOOL PAPER).-MODELLING AND ANALYSIS OF MARKOV REWARD AUTOMATA EXTENSIONAL CRISIS AND PROVING IDENTITY DECIDING ENTAILMENTS IN INDUCTIVE SEPARATION LOGIC WITH TREE AUTOMATA LIVENESS ANALYSIS FOR PARAMETERISED BOOLEAN EQUATION SYSTEMS RABINIZER 3: SAFRALESS TRANSLATION OF LTL TO SMALL DETERMINISTIC AUTOMATA PECAN: COMPOSITIONAL VERIFICATION OF PETRI NETS MADE EASY THE CONTEXT-FREENESS PROBLEM IS CONP-COMPLETE FOR FLAT COUNTER SYSTEMS EFFICIENTLY AND COMPLETELY VERIFYING SYNCHRONIZED CONSISTENCY MODELS SYMMETRY REDUCTION IN INFINITE GAMES WITH FINITE BRANCHING INCREMENTAL ENCODING AND SOLVING OF CARDINALITY CONSTRAINTS FORMAL VERIFICATION OF SKIPLISTS WITH ARBITRARY MANY LEVELS USING FLOW SPECIFICATIONS OF PARAMETERIZED CACHE COHERENCE PROTOCOLS FOR VERIFYING DEADLOCK FREEDOM A GAME-THEORETIC APPROACH TO SIMULATION OF DATA-PARAMETERIZED SYSTEMS NESTED REACHABILITY APPROXIMATION FOR DISCRETE-TIME MARKOV CHAINS WITH UNIVARIATE PARAMETERS SYMBOLIC MEMORY WITH POINTERS TRACE ABSTRACTION REFINEMENT FOR TIMED AUTOMATA STATISTICALLY SOUND VERIFICATION AND OPTIMIZATION FOR COMPLEX SYSTEMS DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT. AUTOMATED TECHNOLOGY FOR VERIFICATION AND ANALYSIS / : 2014 ABSTRACT / INHALTSTEXT THIS BOOK CONSTITUTES THE PROCEEDINGS OF THE 12TH INTERNATIONAL SYMPOSIUM ON AUTOMATED TECHNOLOGY FOR VERIFICATION AND ANALYSIS, ATVA 2014, HELD IN SYDNEY, AUSTRALIA, IN NOVEMBER 2014. THE 29 REVISED PAPERS PRESENTED IN THIS VOLUME WERE CAREFULLY REVIEWED AND SELECTED FROM 76 SUBMISSIONS. THEY SHOW CURRENT RESEARCH ON THEORETICAL AND PRACTICAL ASPECTS OF AUTOMATED ANALYSIS, VERIFICATION AND SYNTHESIS BY PROVIDING AN INTERNATIONAL FORUM FOR INTERACTION AMONG THE RESEARCHERS IN ACADEMIA AND INDUSTRY DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT.
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series	Lecture Notes in Computer Science
series2	Lecture Notes in Computer Science
spelling	Automated Technology for Verification and Analysis 12th International Symposium, ATVA 2014, Sydney, NSW, Australia, November 3-7, 2014 : Proceedings Franck Cassez, Jean-François Raskin (Eds.) Cham ; Heidelberg ; New York ; Dordrecht ; London Springer [2014] © 2014 1 Online Ressource (XXIII, 430 Seiten) Diagramme txt rdacontent c rdamedia cr rdacarrier Lecture Notes in Computer Science 8837 Computer science Computer communication systems Computer programming Software engineering Programming languages (Electronic computers) Computer logic Mathematical logic Computer Science Software Engineering Programming Techniques Computer Communication Networks Logics and Meanings of Programs Programming Languages, Compilers, Interpreters Mathematical Logic and Formal Languages Informatik Formale Methode (DE-588)4333722-3 gnd rswk-swf Eingebettetes System (DE-588)4396978-1 gnd rswk-swf Systemanalyse (DE-588)4116673-5 gnd rswk-swf Verifikation (DE-588)4135577-5 gnd rswk-swf CASHE (DE-588)4388634-6 gnd rswk-swf Systemsynthese (DE-588)4198909-0 gnd rswk-swf Systementwurf (DE-588)4261480-6 gnd rswk-swf (DE-588)1071861417 Konferenzschrift 2014 Sydney gnd-content Formale Methode (DE-588)4333722-3 s Verifikation (DE-588)4135577-5 s Systementwurf (DE-588)4261480-6 s Systemanalyse (DE-588)4116673-5 s Systemsynthese (DE-588)4198909-0 s Eingebettetes System (DE-588)4396978-1 s CASHE (DE-588)4388634-6 s DE-604 Cassez, Franck 1967- (DE-588)123234034 edt Raskin, Jean-François edt ATVA 12. 2014 Sydney (DE-588)1059466473 isb Lecture Notes in Computer Science 8837 (DE-604)BV014880109 8837 https://doi.org/10.1007/978-3-319-11936-6 Verlag URL des Erstveröffentlichers Volltext Springer Fremddatenuebernahme application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=028632590&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis Springer Fremddatenuebernahme application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=028632590&sequence=000003&line_number=0002&func_code=DB_RECORDS&service_type=MEDIA Abstract
spellingShingle	Automated Technology for Verification and Analysis 12th International Symposium, ATVA 2014, Sydney, NSW, Australia, November 3-7, 2014 : Proceedings Lecture Notes in Computer Science Computer science Computer communication systems Computer programming Software engineering Programming languages (Electronic computers) Computer logic Mathematical logic Computer Science Software Engineering Programming Techniques Computer Communication Networks Logics and Meanings of Programs Programming Languages, Compilers, Interpreters Mathematical Logic and Formal Languages Informatik Formale Methode (DE-588)4333722-3 gnd Eingebettetes System (DE-588)4396978-1 gnd Systemanalyse (DE-588)4116673-5 gnd Verifikation (DE-588)4135577-5 gnd CASHE (DE-588)4388634-6 gnd Systemsynthese (DE-588)4198909-0 gnd Systementwurf (DE-588)4261480-6 gnd
subject_GND	(DE-588)4333722-3 (DE-588)4396978-1 (DE-588)4116673-5 (DE-588)4135577-5 (DE-588)4388634-6 (DE-588)4198909-0 (DE-588)4261480-6 (DE-588)1071861417
title	Automated Technology for Verification and Analysis 12th International Symposium, ATVA 2014, Sydney, NSW, Australia, November 3-7, 2014 : Proceedings
title_auth	Automated Technology for Verification and Analysis 12th International Symposium, ATVA 2014, Sydney, NSW, Australia, November 3-7, 2014 : Proceedings
title_exact_search	Automated Technology for Verification and Analysis 12th International Symposium, ATVA 2014, Sydney, NSW, Australia, November 3-7, 2014 : Proceedings
title_full	Automated Technology for Verification and Analysis 12th International Symposium, ATVA 2014, Sydney, NSW, Australia, November 3-7, 2014 : Proceedings Franck Cassez, Jean-François Raskin (Eds.)
title_fullStr	Automated Technology for Verification and Analysis 12th International Symposium, ATVA 2014, Sydney, NSW, Australia, November 3-7, 2014 : Proceedings Franck Cassez, Jean-François Raskin (Eds.)
title_full_unstemmed	Automated Technology for Verification and Analysis 12th International Symposium, ATVA 2014, Sydney, NSW, Australia, November 3-7, 2014 : Proceedings Franck Cassez, Jean-François Raskin (Eds.)
title_short	Automated Technology for Verification and Analysis
title_sort	automated technology for verification and analysis 12th international symposium atva 2014 sydney nsw australia november 3 7 2014 proceedings
title_sub	12th International Symposium, ATVA 2014, Sydney, NSW, Australia, November 3-7, 2014 : Proceedings
topic	Computer science Computer communication systems Computer programming Software engineering Programming languages (Electronic computers) Computer logic Mathematical logic Computer Science Software Engineering Programming Techniques Computer Communication Networks Logics and Meanings of Programs Programming Languages, Compilers, Interpreters Mathematical Logic and Formal Languages Informatik Formale Methode (DE-588)4333722-3 gnd Eingebettetes System (DE-588)4396978-1 gnd Systemanalyse (DE-588)4116673-5 gnd Verifikation (DE-588)4135577-5 gnd CASHE (DE-588)4388634-6 gnd Systemsynthese (DE-588)4198909-0 gnd Systementwurf (DE-588)4261480-6 gnd
topic_facet	Computer science Computer communication systems Computer programming Software engineering Programming languages (Electronic computers) Computer logic Mathematical logic Computer Science Software Engineering Programming Techniques Computer Communication Networks Logics and Meanings of Programs Programming Languages, Compilers, Interpreters Mathematical Logic and Formal Languages Informatik Formale Methode Eingebettetes System Systemanalyse Verifikation CASHE Systemsynthese Systementwurf Konferenzschrift 2014 Sydney
url	https://doi.org/10.1007/978-3-319-11936-6 http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=028632590&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=028632590&sequence=000003&line_number=0002&func_code=DB_RECORDS&service_type=MEDIA
volume_link	(DE-604)BV014880109
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