ESL design and verification: a prescription for electronic system-level methodology
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Amsterdam
Morgan Kaufmann
c2007
|
| Schriftenreihe: | Morgan Kaufmann series in systems on silicon
|
| Schlagworte: | |
| Online-Zugang: | FAW01 FAW02 Volltext |
| Beschreibung: | Includes bibliographical references and index CHAPTER 1 WHAT IS ESL?. CHAPTER 2 TAXONOMY AND DEFINITIONS FOR THE ELECTRONIC SYSTEM LEVEL CHAPTER 3 EVOLUTION OF ESL DEVELOPMENT CHAPTER 4 WHAT ARE THE ENABLERS OF ESL?. CHAPTER 5 ESL FLOW. CHAPTER 6 SPECIFICATIONS AND MODELING. CHAPTER 7 PRE-PARTITIONING ANALYSIS. CHAPTER 8 PARTITIONING. CHAPTER 9 POST-PARTITIONING ANALYSIS AND DEBUG CHAPTER 10 POST-PARTITIONING VERIFICATION. CHAPTER 11 HARDWARE IMPLEMENTATION. CHAPTER 12 SOFTWARE IMPLEMENTATION. CHAPTER 13 USE OF ESL FOR IMPLEMENTATION VERIFICATION CHAPTER 14 RESEARCH, EMERGING AND FUTURE PROSPECTS. APPENDIX: LIST OF ACRONYMS. Electronic System Level (ESL) design has mainstreamed it is now an established approach at most of the worlds leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with no links to implementation, ESL is evolving into a set of complementary methodologies that enable embedded system design, verification and debug through to the hardware and software implementation of custom SoC, system-on-FPGA, system-on-board, and entire multi-board systems. This book arises from experience the authors have gained from years of work as industry practitioners in the Electronic System Level design area; they have seen "SLD" or "ESL" go through many stages and false starts, and have observed that the shift in design methodologies to ESL is finally occurring. This is partly because of ESL technologies themselves are stabilizing on a useful set of languages being standardized (SystemC is the most notable), and use models are being identified that are beginning to get real adoption. ESL DESIGN & VERIFICATION offers a true prescriptive guide to ESL that reviews its past and outlines the best practices of today. Visit the authors' companion site! http://www.electronicsystemlevel.com/ * Provides broad, comprehensive coverage not available in any other such book * Massive global appeal with an internationally recognised author team * Crammed full of state of the art content from notable industry experts |
| Beschreibung: | 1 Online-Ressource (xxv, 462 p.) |
| ISBN: | 0080488838 0123735513 9780080488837 9780123735515 |
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Datensatz im Suchindex
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|---|---|
| any_adam_object | |
| author | Bailey, Brian |
| author_facet | Bailey, Brian |
| author_role | aut |
| author_sort | Bailey, Brian |
| author_variant | b b bb |
| building | Verbundindex |
| bvnumber | BV043164689 |
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| dewey-full | 621.3815 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3815 |
| dewey-search | 621.3815 |
| dewey-sort | 3621.3815 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Electronic eBook |
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| id | DE-604.BV043164689 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-10T07:19:28Z |
| institution | BVB |
| isbn | 0080488838 0123735513 9780080488837 9780123735515 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-028588879 |
| oclc_num | 146316668 |
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| owner | DE-1046 DE-1047 |
| owner_facet | DE-1046 DE-1047 |
| physical | 1 Online-Ressource (xxv, 462 p.) |
| psigel | ZDB-4-EBA ZDB-4-EBA FAW_PDA_EBA |
| publishDate | 2007 |
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| publisher | Morgan Kaufmann |
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| spelling | Bailey, Brian Verfasser aut ESL design and verification a prescription for electronic system-level methodology Brian Bailey, Grant Martin, Andrew Piziali Electronic system-level design Amsterdam Morgan Kaufmann c2007 1 Online-Ressource (xxv, 462 p.) txt rdacontent c rdamedia cr rdacarrier Morgan Kaufmann series in systems on silicon Includes bibliographical references and index CHAPTER 1 WHAT IS ESL?. CHAPTER 2 TAXONOMY AND DEFINITIONS FOR THE ELECTRONIC SYSTEM LEVEL CHAPTER 3 EVOLUTION OF ESL DEVELOPMENT CHAPTER 4 WHAT ARE THE ENABLERS OF ESL?. CHAPTER 5 ESL FLOW. CHAPTER 6 SPECIFICATIONS AND MODELING. CHAPTER 7 PRE-PARTITIONING ANALYSIS. CHAPTER 8 PARTITIONING. CHAPTER 9 POST-PARTITIONING ANALYSIS AND DEBUG CHAPTER 10 POST-PARTITIONING VERIFICATION. CHAPTER 11 HARDWARE IMPLEMENTATION. CHAPTER 12 SOFTWARE IMPLEMENTATION. CHAPTER 13 USE OF ESL FOR IMPLEMENTATION VERIFICATION CHAPTER 14 RESEARCH, EMERGING AND FUTURE PROSPECTS. APPENDIX: LIST OF ACRONYMS. Electronic System Level (ESL) design has mainstreamed it is now an established approach at most of the worlds leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with no links to implementation, ESL is evolving into a set of complementary methodologies that enable embedded system design, verification and debug through to the hardware and software implementation of custom SoC, system-on-FPGA, system-on-board, and entire multi-board systems. This book arises from experience the authors have gained from years of work as industry practitioners in the Electronic System Level design area; they have seen "SLD" or "ESL" go through many stages and false starts, and have observed that the shift in design methodologies to ESL is finally occurring. This is partly because of ESL technologies themselves are stabilizing on a useful set of languages being standardized (SystemC is the most notable), and use models are being identified that are beginning to get real adoption. ESL DESIGN & VERIFICATION offers a true prescriptive guide to ESL that reviews its past and outlines the best practices of today. Visit the authors' companion site! http://www.electronicsystemlevel.com/ * Provides broad, comprehensive coverage not available in any other such book * Massive global appeal with an internationally recognised author team * Crammed full of state of the art content from notable industry experts TECHNOLOGY & ENGINEERING / Electronics / Circuits / Integrated bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / General bisacsh Systems on a chip / Design and construction blmlsh Systems on a chip / Design and construction local Systems on a chip / Design and construction fast Systems on a chip Design and construction System-on-Chip (DE-588)4740357-3 gnd rswk-swf Verifikation (DE-588)4135577-5 gnd rswk-swf Systementwurf (DE-588)4261480-6 gnd rswk-swf System-on-Chip (DE-588)4740357-3 s Systementwurf (DE-588)4261480-6 s Verifikation (DE-588)4135577-5 s 1\p DE-604 Martin, Grant Sonstige oth Piziali, Andrew Sonstige oth http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=196165 Aggregator Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Bailey, Brian ESL design and verification a prescription for electronic system-level methodology TECHNOLOGY & ENGINEERING / Electronics / Circuits / Integrated bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / General bisacsh Systems on a chip / Design and construction blmlsh Systems on a chip / Design and construction local Systems on a chip / Design and construction fast Systems on a chip Design and construction System-on-Chip (DE-588)4740357-3 gnd Verifikation (DE-588)4135577-5 gnd Systementwurf (DE-588)4261480-6 gnd |
| subject_GND | (DE-588)4740357-3 (DE-588)4135577-5 (DE-588)4261480-6 |
| title | ESL design and verification a prescription for electronic system-level methodology |
| title_alt | Electronic system-level design |
| title_auth | ESL design and verification a prescription for electronic system-level methodology |
| title_exact_search | ESL design and verification a prescription for electronic system-level methodology |
| title_full | ESL design and verification a prescription for electronic system-level methodology Brian Bailey, Grant Martin, Andrew Piziali |
| title_fullStr | ESL design and verification a prescription for electronic system-level methodology Brian Bailey, Grant Martin, Andrew Piziali |
| title_full_unstemmed | ESL design and verification a prescription for electronic system-level methodology Brian Bailey, Grant Martin, Andrew Piziali |
| title_short | ESL design and verification |
| title_sort | esl design and verification a prescription for electronic system level methodology |
| title_sub | a prescription for electronic system-level methodology |
| topic | TECHNOLOGY & ENGINEERING / Electronics / Circuits / Integrated bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / General bisacsh Systems on a chip / Design and construction blmlsh Systems on a chip / Design and construction local Systems on a chip / Design and construction fast Systems on a chip Design and construction System-on-Chip (DE-588)4740357-3 gnd Verifikation (DE-588)4135577-5 gnd Systementwurf (DE-588)4261480-6 gnd |
| topic_facet | TECHNOLOGY & ENGINEERING / Electronics / Circuits / Integrated TECHNOLOGY & ENGINEERING / Electronics / Circuits / General Systems on a chip / Design and construction Systems on a chip Design and construction System-on-Chip Verifikation Systementwurf |
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