Neural networks and systolic array design:
Gespeichert in:
| Format: | Elektronisch E-Book |
|---|---|
| Sprache: | English |
| Veröffentlicht: |
River Edge, N.J.
World Scientific
c2002
|
| Schriftenreihe: | Series in machine perception and artificial intelligence
v. 49 |
| Schlagworte: | |
| Online-Zugang: | FAW01 FAW02 Volltext |
| Beschreibung: | Includes bibliographical references and index Ch. 1 - Neural networks and systolic arrays: models and integration - D. Zhang and S.K. Pal -- - Ch. 2 - Systolic array methodology for a neural model to solve the mixture problem - R.M. Pérez ... [et al.] -- - Ch. 3 - Morphological endmember identification and its systolic array design - P.L Aguilar ... [et al.] -- - Ch. 4 - MANTRA I: a systolic array for neural computation - M.A. Viredaz and P. Ienne -- - Ch. 5 - Mixed-signal neuro-fuzzy processor implementations: sequential architectures and circuit-level description - J. Madrenas and E. Alarcón -- - Ch. 6 - CMAC neural networks and systolic implementation - B.D. Lui, Y.H. Kuo and J.S. Ker -- - Ch. 7 - Quadrant interlocking factorization on systolic and wavefront array processors - M.P. Bekakos, O.B. Efremides and D.J. Evans -- - Ch. 8 - Systolic S.O.M. neural network for hyperspectral image classification - P. Martinez ... [et al.] Ch. 9 - Optimizing and learning algorithm for feedforward neural networks and its implementation by systolic array - P.B. Burgos -- - Ch. 10 - Parallel ANN architecture for fuzzy patterns - D. Zhang and S.K. Pal -- - Ch. 11 - Pipelined systolic arrays for time-delay neural networks - D. Zhang and S.K. Pal -- - Ch. 12 - An integrated intelligent classification engine (I[superscript 2]CE for biosignal engineering - A.N. Kastania and M.P. Bekakos -- - Ch. 13 - Multiplierless designs for artificial neural networks - H.K. Kwan -- - Ch. 14 - A VLSI system for intelligent decision making in real-time - N. Ranganathan and M.I. Patel -- - Ch. 15 - Reconfigurable hardware systolic array for real-time compartmental modeling of large-scale artificial nervous systems - M. Korkin -- - Ch. 16 - Implementing and mapping ANNs on reconfigurable mesh massively parallel architectures - W.N. Li and J.J. Jenq |
| Beschreibung: | 1 Online-Ressource (xiv, 405 p.) |
| ISBN: | 9789810248406 9789812778086 9810248407 981277808X |
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| 490 | 0 | |a Series in machine perception and artificial intelligence |v v. 49 | |
| 500 | |a Includes bibliographical references and index | ||
| 500 | |a Ch. 1 - Neural networks and systolic arrays: models and integration - D. Zhang and S.K. Pal -- - Ch. 2 - Systolic array methodology for a neural model to solve the mixture problem - R.M. Pérez ... [et al.] -- - Ch. 3 - Morphological endmember identification and its systolic array design - P.L Aguilar ... [et al.] -- - Ch. 4 - MANTRA I: a systolic array for neural computation - M.A. Viredaz and P. Ienne -- - Ch. 5 - Mixed-signal neuro-fuzzy processor implementations: sequential architectures and circuit-level description - J. Madrenas and E. Alarcón -- - Ch. 6 - CMAC neural networks and systolic implementation - B.D. Lui, Y.H. Kuo and J.S. Ker -- - Ch. 7 - Quadrant interlocking factorization on systolic and wavefront array processors - M.P. Bekakos, O.B. Efremides and D.J. Evans -- - Ch. 8 - Systolic S.O.M. neural network for hyperspectral image classification - P. Martinez ... [et al.] | ||
| 500 | |a Ch. 9 - Optimizing and learning algorithm for feedforward neural networks and its implementation by systolic array - P.B. Burgos -- - Ch. 10 - Parallel ANN architecture for fuzzy patterns - D. Zhang and S.K. Pal -- - Ch. 11 - Pipelined systolic arrays for time-delay neural networks - D. Zhang and S.K. Pal -- - Ch. 12 - An integrated intelligent classification engine (I[superscript 2]CE for biosignal engineering - A.N. Kastania and M.P. Bekakos -- - Ch. 13 - Multiplierless designs for artificial neural networks - H.K. Kwan -- - Ch. 14 - A VLSI system for intelligent decision making in real-time - N. Ranganathan and M.I. Patel -- - Ch. 15 - Reconfigurable hardware systolic array for real-time compartmental modeling of large-scale artificial nervous systems - M. Korkin -- - Ch. 16 - Implementing and mapping ANNs on reconfigurable mesh massively parallel architectures - W.N. Li and J.J. Jenq | ||
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| 650 | 4 | |a Systolic array circuits |x Design and construction | |
| 700 | 1 | |a Zhang, David |e Sonstige |4 oth | |
| 700 | 1 | |a Pal, Sankar K. |e Sonstige |4 oth | |
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| institution | BVB |
| isbn | 9789810248406 9789812778086 9810248407 981277808X |
| language | English |
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| spelling | Neural networks and systolic array design editors, David Zhang, Sankar K. Pal River Edge, N.J. World Scientific c2002 1 Online-Ressource (xiv, 405 p.) txt rdacontent c rdamedia cr rdacarrier Series in machine perception and artificial intelligence v. 49 Includes bibliographical references and index Ch. 1 - Neural networks and systolic arrays: models and integration - D. Zhang and S.K. Pal -- - Ch. 2 - Systolic array methodology for a neural model to solve the mixture problem - R.M. Pérez ... [et al.] -- - Ch. 3 - Morphological endmember identification and its systolic array design - P.L Aguilar ... [et al.] -- - Ch. 4 - MANTRA I: a systolic array for neural computation - M.A. Viredaz and P. Ienne -- - Ch. 5 - Mixed-signal neuro-fuzzy processor implementations: sequential architectures and circuit-level description - J. Madrenas and E. Alarcón -- - Ch. 6 - CMAC neural networks and systolic implementation - B.D. Lui, Y.H. Kuo and J.S. Ker -- - Ch. 7 - Quadrant interlocking factorization on systolic and wavefront array processors - M.P. Bekakos, O.B. Efremides and D.J. Evans -- - Ch. 8 - Systolic S.O.M. neural network for hyperspectral image classification - P. Martinez ... [et al.] Ch. 9 - Optimizing and learning algorithm for feedforward neural networks and its implementation by systolic array - P.B. Burgos -- - Ch. 10 - Parallel ANN architecture for fuzzy patterns - D. Zhang and S.K. Pal -- - Ch. 11 - Pipelined systolic arrays for time-delay neural networks - D. Zhang and S.K. Pal -- - Ch. 12 - An integrated intelligent classification engine (I[superscript 2]CE for biosignal engineering - A.N. Kastania and M.P. Bekakos -- - Ch. 13 - Multiplierless designs for artificial neural networks - H.K. Kwan -- - Ch. 14 - A VLSI system for intelligent decision making in real-time - N. Ranganathan and M.I. Patel -- - Ch. 15 - Reconfigurable hardware systolic array for real-time compartmental modeling of large-scale artificial nervous systems - M. Korkin -- - Ch. 16 - Implementing and mapping ANNs on reconfigurable mesh massively parallel architectures - W.N. Li and J.J. Jenq COMPUTERS / Neural Networks bisacsh Neural networks (Computer science) fast Systolic array circuits / Design and construction fast Neural networks (Computer science) Systolic array circuits Design and construction Zhang, David Sonstige oth Pal, Sankar K. Sonstige oth http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=514253 Aggregator Volltext |
| spellingShingle | Neural networks and systolic array design COMPUTERS / Neural Networks bisacsh Neural networks (Computer science) fast Systolic array circuits / Design and construction fast Neural networks (Computer science) Systolic array circuits Design and construction |
| title | Neural networks and systolic array design |
| title_auth | Neural networks and systolic array design |
| title_exact_search | Neural networks and systolic array design |
| title_full | Neural networks and systolic array design editors, David Zhang, Sankar K. Pal |
| title_fullStr | Neural networks and systolic array design editors, David Zhang, Sankar K. Pal |
| title_full_unstemmed | Neural networks and systolic array design editors, David Zhang, Sankar K. Pal |
| title_short | Neural networks and systolic array design |
| title_sort | neural networks and systolic array design |
| topic | COMPUTERS / Neural Networks bisacsh Neural networks (Computer science) fast Systolic array circuits / Design and construction fast Neural networks (Computer science) Systolic array circuits Design and construction |
| topic_facet | COMPUTERS / Neural Networks Neural networks (Computer science) Systolic array circuits / Design and construction Systolic array circuits Design and construction |
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| work_keys_str_mv | AT zhangdavid neuralnetworksandsystolicarraydesign AT palsankark neuralnetworksandsystolicarraydesign |