Demystifying chipmaking:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Oxford
Elsevier/Newnes
c2005
|
| Schlagworte: | |
| Online-Zugang: | FAW01 FAW02 Volltext |
| Beschreibung: | Includes DVD. Includes bibliographical references (p. 251-252) and index CH 1: IC Fabrication Overview / CH 2: Support Technologies / CH 3: Forming Wells / CH 4: Isolate Active Areas (Shallow Trench Isolation) / CH 5: Building the Transistors / CH 6: First Level Metallization / CH 7: Multilevel Metal Interconnects and Dual Damascene / CH 8: Test and Assembly / APPENDIX A: Science Overview / APPENDIX B: Plasma Etch Supplement to Chapter 4 IC fabrication overview -- Introduction -- Support technologies -- Integrated circuit fabrication -- Test and assembly -- Summary -- Support technologies -- Introduction -- Contamination control -- Crystal growth and wafer preparation -- Circuit design -- Photomask and reticle preparation -- Forming wells -- Introduction -- Initial oxidation -- Photolithography -- Ion implantation -- Isolate active areas (shallow trench isolation) -- Introduction to shallow trench isolation -- Pad oxide growth -- Silicon Nitride deposition -- Photolithography for photo/etch -- From trenches in silicon dioxide -- Chemical mechanical polishing (CMP) to remove excess dioxide -- Wet etch removal of Silicon Nitride and pad oxide -- Building the transistors -- Introduction -- Thin film formation -- Poly gate formation -- Source/drain formation -- Salicide formation -- First level metallization -- Introduction -- Nitride and oxide depositions -- CMP planarization -- Photo/etch for contact holes -- Tungsten plug process -- Low-k dielectric process -- Copper first level interconnection process -- Multilevel metal interconnects and dual damascene -- Introduction -- Deposit barrier layer and intermetal dielectric -- Dual damascene process -- Form bonding pads -- Final passivation process -- Test and assembly -- Introduction -- Wafer and chip testing -- Assembly and packaging This book takes the reader through the actual manufacturing process of making a typical chip, from start to finish, including a detailed discussion of each step, in plain language. The evolution of today's technology is added to the story, as seen through the eyes of the engineers who solved some of the problems. The authors are well suited to that discussion since they are three of those same engineers. They have a broad exposure to the industry and its technology that extends all the way back to Shockley Laboratories, the first semiconductor manufacturer in Silicon Valley. The CMOS (Complementary Metal-Oxide-Semiconductor) process flow is the focus of the discussion and is covered in ten chapters. The vast majority of chips made today are fabricated using this general method. In order to ensure that all readers are comfortable with the vocabulary, the first chapter carefully and clearly introduces the science concepts found in later chapters. A chapter is devoted to pointing out the differences in other manufacturing methods, such as the gallium arsenide technology that produces chips for cell phones. In addition, a chapter describing the nature of the semiconductor industry from a business perspective is included. "The entire process of making a chip is surprisingly easy to understand. The part of the story that defies belief is the tiny dimensions: the conducting wires and other structures on a chip are more than a hundred times thinner than a hair - and getting thinner with every new chip design." * Included CD gives the reader a much greater comprehension of the process than a strictly print book with static illustrations provides * Authors are actual engineers who have a broad range of exposure and experience with chip technology * Contains a unique chapter describing the nature of the semiconductor industry from a business perspective |
| Beschreibung: | 1 Online-Ressource (xvii, 256 p.) |
| ISBN: | 0080477097 0750677600 1423723503 9780080477091 9780750677608 9781423723509 |
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Datensatz im Suchindex
| _version_ | 1804175540703199232 |
|---|---|
| any_adam_object | |
| author | Yanda, Richard F. |
| author_facet | Yanda, Richard F. |
| author_role | aut |
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| author_variant | r f y rf rfy |
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| bvnumber | BV043115968 |
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| dewey-full | 621.39732 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39732 |
| dewey-search | 621.39732 |
| dewey-sort | 3621.39732 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Electronic eBook |
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| id | DE-604.BV043115968 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-10T07:17:55Z |
| institution | BVB |
| isbn | 0080477097 0750677600 1423723503 9780080477091 9780750677608 9781423723509 |
| language | English |
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| oclc_num | 61408593 |
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| owner_facet | DE-1046 DE-1047 |
| physical | 1 Online-Ressource (xvii, 256 p.) |
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| spelling | Yanda, Richard F. Verfasser aut Demystifying chipmaking Richard F. Yanda, Michael Heynes, Anne Miller Oxford Elsevier/Newnes c2005 1 Online-Ressource (xvii, 256 p.) txt rdacontent c rdamedia cr rdacarrier Includes DVD. Includes bibliographical references (p. 251-252) and index CH 1: IC Fabrication Overview / CH 2: Support Technologies / CH 3: Forming Wells / CH 4: Isolate Active Areas (Shallow Trench Isolation) / CH 5: Building the Transistors / CH 6: First Level Metallization / CH 7: Multilevel Metal Interconnects and Dual Damascene / CH 8: Test and Assembly / APPENDIX A: Science Overview / APPENDIX B: Plasma Etch Supplement to Chapter 4 IC fabrication overview -- Introduction -- Support technologies -- Integrated circuit fabrication -- Test and assembly -- Summary -- Support technologies -- Introduction -- Contamination control -- Crystal growth and wafer preparation -- Circuit design -- Photomask and reticle preparation -- Forming wells -- Introduction -- Initial oxidation -- Photolithography -- Ion implantation -- Isolate active areas (shallow trench isolation) -- Introduction to shallow trench isolation -- Pad oxide growth -- Silicon Nitride deposition -- Photolithography for photo/etch -- From trenches in silicon dioxide -- Chemical mechanical polishing (CMP) to remove excess dioxide -- Wet etch removal of Silicon Nitride and pad oxide -- Building the transistors -- Introduction -- Thin film formation -- Poly gate formation -- Source/drain formation -- Salicide formation -- First level metallization -- Introduction -- Nitride and oxide depositions -- CMP planarization -- Photo/etch for contact holes -- Tungsten plug process -- Low-k dielectric process -- Copper first level interconnection process -- Multilevel metal interconnects and dual damascene -- Introduction -- Deposit barrier layer and intermetal dielectric -- Dual damascene process -- Form bonding pads -- Final passivation process -- Test and assembly -- Introduction -- Wafer and chip testing -- Assembly and packaging This book takes the reader through the actual manufacturing process of making a typical chip, from start to finish, including a detailed discussion of each step, in plain language. The evolution of today's technology is added to the story, as seen through the eyes of the engineers who solved some of the problems. The authors are well suited to that discussion since they are three of those same engineers. They have a broad exposure to the industry and its technology that extends all the way back to Shockley Laboratories, the first semiconductor manufacturer in Silicon Valley. The CMOS (Complementary Metal-Oxide-Semiconductor) process flow is the focus of the discussion and is covered in ten chapters. The vast majority of chips made today are fabricated using this general method. In order to ensure that all readers are comfortable with the vocabulary, the first chapter carefully and clearly introduces the science concepts found in later chapters. A chapter is devoted to pointing out the differences in other manufacturing methods, such as the gallium arsenide technology that produces chips for cell phones. In addition, a chapter describing the nature of the semiconductor industry from a business perspective is included. "The entire process of making a chip is surprisingly easy to understand. The part of the story that defies belief is the tiny dimensions: the conducting wires and other structures on a chip are more than a hundred times thinner than a hair - and getting thinner with every new chip design." * Included CD gives the reader a much greater comprehension of the process than a strictly print book with static illustrations provides * Authors are actual engineers who have a broad range of exposure and experience with chip technology * Contains a unique chapter describing the nature of the semiconductor industry from a business perspective COMPUTERS / Machine Theory bisacsh COMPUTERS / Computer Engineering bisacsh COMPUTERS / Hardware / General bisacsh Logic circuits / Design and construction fast Metal oxide semiconductors, Complementary fast Logic circuits Design and construction Metal oxide semiconductors, Complementary Integrierte Schaltung (DE-588)4027242-4 gnd rswk-swf Produktion (DE-588)4047347-8 gnd rswk-swf Integrierte Schaltung (DE-588)4027242-4 s Produktion (DE-588)4047347-8 s 1\p DE-604 Heynes, Michael Sonstige oth Miller, Anne K. Sonstige oth http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=130229 Aggregator Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Yanda, Richard F. Demystifying chipmaking COMPUTERS / Machine Theory bisacsh COMPUTERS / Computer Engineering bisacsh COMPUTERS / Hardware / General bisacsh Logic circuits / Design and construction fast Metal oxide semiconductors, Complementary fast Logic circuits Design and construction Metal oxide semiconductors, Complementary Integrierte Schaltung (DE-588)4027242-4 gnd Produktion (DE-588)4047347-8 gnd |
| subject_GND | (DE-588)4027242-4 (DE-588)4047347-8 |
| title | Demystifying chipmaking |
| title_auth | Demystifying chipmaking |
| title_exact_search | Demystifying chipmaking |
| title_full | Demystifying chipmaking Richard F. Yanda, Michael Heynes, Anne Miller |
| title_fullStr | Demystifying chipmaking Richard F. Yanda, Michael Heynes, Anne Miller |
| title_full_unstemmed | Demystifying chipmaking Richard F. Yanda, Michael Heynes, Anne Miller |
| title_short | Demystifying chipmaking |
| title_sort | demystifying chipmaking |
| topic | COMPUTERS / Machine Theory bisacsh COMPUTERS / Computer Engineering bisacsh COMPUTERS / Hardware / General bisacsh Logic circuits / Design and construction fast Metal oxide semiconductors, Complementary fast Logic circuits Design and construction Metal oxide semiconductors, Complementary Integrierte Schaltung (DE-588)4027242-4 gnd Produktion (DE-588)4047347-8 gnd |
| topic_facet | COMPUTERS / Machine Theory COMPUTERS / Computer Engineering COMPUTERS / Hardware / General Logic circuits / Design and construction Metal oxide semiconductors, Complementary Logic circuits Design and construction Integrierte Schaltung Produktion |
| url | http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=130229 |
| work_keys_str_mv | AT yandarichardf demystifyingchipmaking AT heynesmichael demystifyingchipmaking AT millerannek demystifyingchipmaking |