Design recipes for FPGAs:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Amsterdam
Newnes
2007
|
| Schlagworte: | |
| Online-Zugang: | FAW01 FAW02 Volltext |
| Beschreibung: | Includes bibliographical references (p. [284]-285) and index Front cover; Design Recipes for FPGAs; Copyright page; Contents; Acknowledgements; Preface; List of Figures; Part 1 Overview; Part 2 Applications; Part 3 Designer's Toolbox; Part 4 Optimizing Designs; Part 5 Fundamental Techniques; Index A rich treasure chest of design techniques and templates for solving practical, every-day problems using FPGAs |
| Beschreibung: | 1 Online-Ressource (xxii, 289 p.) |
| ISBN: | 0080548423 9780080548425 |
Internformat
MARC
| LEADER | 00000nmm a2200000zc 4500 | ||
|---|---|---|---|
| 001 | BV043103727 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | cr|uuu---uuuuu | ||
| 008 | 151126s2007 |||| o||u| ||||||eng d | ||
| 020 | |a 0080548423 |c electronic bk. |9 0-08-054842-3 | ||
| 020 | |a 9780080548425 |c electronic bk. |9 978-0-08-054842-5 | ||
| 035 | |a (OCoLC)173502373 | ||
| 035 | |a (DE-599)BVBBV043103727 | ||
| 040 | |a DE-604 |b ger |e aacr | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-1046 |a DE-1047 | ||
| 082 | 0 | |a 621.395 |2 22 | |
| 100 | 1 | |a Wilson, Peter R., (Peter Robert) |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Design recipes for FPGAs |c Peter R. Wilson |
| 264 | 1 | |a Amsterdam |b Newnes |c 2007 | |
| 300 | |a 1 Online-Ressource (xxii, 289 p.) | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b c |2 rdamedia | ||
| 338 | |b cr |2 rdacarrier | ||
| 500 | |a Includes bibliographical references (p. [284]-285) and index | ||
| 500 | |a Front cover; Design Recipes for FPGAs; Copyright page; Contents; Acknowledgements; Preface; List of Figures; Part 1 Overview; Part 2 Applications; Part 3 Designer's Toolbox; Part 4 Optimizing Designs; Part 5 Fundamental Techniques; Index | ||
| 500 | |a A rich treasure chest of design techniques and templates for solving practical, every-day problems using FPGAs | ||
| 650 | 7 | |a TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. |2 bisacsh | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic |2 bisacsh | |
| 650 | 7 | |a COMPUTERS / Logic Design |2 bisacsh | |
| 650 | 7 | |a Field programmable gate arrays / Design and construction |2 fast | |
| 650 | 4 | |a Field programmable gate arrays |x Design and construction | |
| 650 | 0 | 7 | |a VHDL |0 (DE-588)4254792-1 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Field programmable gate array |0 (DE-588)4347749-5 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a VERILOG |0 (DE-588)4268385-3 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a Field programmable gate array |0 (DE-588)4347749-5 |D s |
| 689 | 0 | 1 | |a VERILOG |0 (DE-588)4268385-3 |D s |
| 689 | 0 | 2 | |a VHDL |0 (DE-588)4254792-1 |D s |
| 689 | 0 | |8 1\p |5 DE-604 | |
| 776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe, Paperback |z 0-7506-6845-8 |
| 776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe, Paperback |z 978-0-7506-6845-3 |
| 856 | 4 | 0 | |u http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=203412 |x Aggregator |3 Volltext |
| 912 | |a ZDB-4-EBA | ||
| 999 | |a oai:aleph.bib-bvb.de:BVB01-028527918 | ||
| 883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
| 966 | e | |u http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=203412 |l FAW01 |p ZDB-4-EBA |q FAW_PDA_EBA |x Aggregator |3 Volltext | |
| 966 | e | |u http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=203412 |l FAW02 |p ZDB-4-EBA |q FAW_PDA_EBA |x Aggregator |3 Volltext | |
Datensatz im Suchindex
| _version_ | 1804175516407693312 |
|---|---|
| any_adam_object | |
| author | Wilson, Peter R., (Peter Robert) |
| author_facet | Wilson, Peter R., (Peter Robert) |
| author_role | aut |
| author_sort | Wilson, Peter R., (Peter Robert) |
| author_variant | p r p r w prpr prprw |
| building | Verbundindex |
| bvnumber | BV043103727 |
| collection | ZDB-4-EBA |
| ctrlnum | (OCoLC)173502373 (DE-599)BVBBV043103727 |
| dewey-full | 621.395 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.395 |
| dewey-search | 621.395 |
| dewey-sort | 3621.395 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Electronic eBook |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>02769nmm a2200541zc 4500</leader><controlfield tag="001">BV043103727</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">151126s2007 |||| o||u| ||||||eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0080548423</subfield><subfield code="c">electronic bk.</subfield><subfield code="9">0-08-054842-3</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9780080548425</subfield><subfield code="c">electronic bk.</subfield><subfield code="9">978-0-08-054842-5</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)173502373</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV043103727</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">aacr</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-1046</subfield><subfield code="a">DE-1047</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.395</subfield><subfield code="2">22</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Wilson, Peter R., (Peter Robert)</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Design recipes for FPGAs</subfield><subfield code="c">Peter R. Wilson</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Amsterdam</subfield><subfield code="b">Newnes</subfield><subfield code="c">2007</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 Online-Ressource (xxii, 289 p.)</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Includes bibliographical references (p. [284]-285) and index</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Front cover; Design Recipes for FPGAs; Copyright page; Contents; Acknowledgements; Preface; List of Figures; Part 1 Overview; Part 2 Applications; Part 3 Designer's Toolbox; Part 4 Optimizing Designs; Part 5 Fundamental Techniques; Index</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">A rich treasure chest of design techniques and templates for solving practical, every-day problems using FPGAs</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI.</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">COMPUTERS / Logic Design</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Field programmable gate arrays / Design and construction</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Field programmable gate arrays</subfield><subfield code="x">Design and construction</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VHDL</subfield><subfield code="0">(DE-588)4254792-1</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Field programmable gate array</subfield><subfield code="0">(DE-588)4347749-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VERILOG</subfield><subfield code="0">(DE-588)4268385-3</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Field programmable gate array</subfield><subfield code="0">(DE-588)4347749-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">VERILOG</subfield><subfield code="0">(DE-588)4268385-3</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="2"><subfield code="a">VHDL</subfield><subfield code="0">(DE-588)4254792-1</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe, Paperback</subfield><subfield code="z">0-7506-6845-8</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe, Paperback</subfield><subfield code="z">978-0-7506-6845-3</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=203412</subfield><subfield code="x">Aggregator</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-4-EBA</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-028527918</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=203412</subfield><subfield code="l">FAW01</subfield><subfield code="p">ZDB-4-EBA</subfield><subfield code="q">FAW_PDA_EBA</subfield><subfield code="x">Aggregator</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=203412</subfield><subfield code="l">FAW02</subfield><subfield code="p">ZDB-4-EBA</subfield><subfield code="q">FAW_PDA_EBA</subfield><subfield code="x">Aggregator</subfield><subfield code="3">Volltext</subfield></datafield></record></collection> |
| id | DE-604.BV043103727 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-10T07:17:32Z |
| institution | BVB |
| isbn | 0080548423 9780080548425 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-028527918 |
| oclc_num | 173502373 |
| open_access_boolean | |
| owner | DE-1046 DE-1047 |
| owner_facet | DE-1046 DE-1047 |
| physical | 1 Online-Ressource (xxii, 289 p.) |
| psigel | ZDB-4-EBA ZDB-4-EBA FAW_PDA_EBA |
| publishDate | 2007 |
| publishDateSearch | 2007 |
| publishDateSort | 2007 |
| publisher | Newnes |
| record_format | marc |
| spelling | Wilson, Peter R., (Peter Robert) Verfasser aut Design recipes for FPGAs Peter R. Wilson Amsterdam Newnes 2007 1 Online-Ressource (xxii, 289 p.) txt rdacontent c rdamedia cr rdacarrier Includes bibliographical references (p. [284]-285) and index Front cover; Design Recipes for FPGAs; Copyright page; Contents; Acknowledgements; Preface; List of Figures; Part 1 Overview; Part 2 Applications; Part 3 Designer's Toolbox; Part 4 Optimizing Designs; Part 5 Fundamental Techniques; Index A rich treasure chest of design techniques and templates for solving practical, every-day problems using FPGAs TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic bisacsh COMPUTERS / Logic Design bisacsh Field programmable gate arrays / Design and construction fast Field programmable gate arrays Design and construction VHDL (DE-588)4254792-1 gnd rswk-swf Field programmable gate array (DE-588)4347749-5 gnd rswk-swf VERILOG (DE-588)4268385-3 gnd rswk-swf Field programmable gate array (DE-588)4347749-5 s VERILOG (DE-588)4268385-3 s VHDL (DE-588)4254792-1 s 1\p DE-604 Erscheint auch als Druck-Ausgabe, Paperback 0-7506-6845-8 Erscheint auch als Druck-Ausgabe, Paperback 978-0-7506-6845-3 http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=203412 Aggregator Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Wilson, Peter R., (Peter Robert) Design recipes for FPGAs TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic bisacsh COMPUTERS / Logic Design bisacsh Field programmable gate arrays / Design and construction fast Field programmable gate arrays Design and construction VHDL (DE-588)4254792-1 gnd Field programmable gate array (DE-588)4347749-5 gnd VERILOG (DE-588)4268385-3 gnd |
| subject_GND | (DE-588)4254792-1 (DE-588)4347749-5 (DE-588)4268385-3 |
| title | Design recipes for FPGAs |
| title_auth | Design recipes for FPGAs |
| title_exact_search | Design recipes for FPGAs |
| title_full | Design recipes for FPGAs Peter R. Wilson |
| title_fullStr | Design recipes for FPGAs Peter R. Wilson |
| title_full_unstemmed | Design recipes for FPGAs Peter R. Wilson |
| title_short | Design recipes for FPGAs |
| title_sort | design recipes for fpgas |
| topic | TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic bisacsh COMPUTERS / Logic Design bisacsh Field programmable gate arrays / Design and construction fast Field programmable gate arrays Design and construction VHDL (DE-588)4254792-1 gnd Field programmable gate array (DE-588)4347749-5 gnd VERILOG (DE-588)4268385-3 gnd |
| topic_facet | TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic COMPUTERS / Logic Design Field programmable gate arrays / Design and construction Field programmable gate arrays Design and construction VHDL Field programmable gate array VERILOG |
| url | http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=203412 |
| work_keys_str_mv | AT wilsonpeterrpeterrobert designrecipesforfpgas |