RTL hardware design using VHDL: coding for efficiency, portability, and scalability
Gespeichert in:
1. Verfasser: | |
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Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
Hoboken, N.J.
Wiley-Interscience
©2006
|
Schlagworte: | |
Online-Zugang: | FAW01 FAW02 Volltext |
Beschreibung: | Includes bibliographical references (pages 665-666) and index Introduction to digital system design -- Overview of hardware description languages -- Basic language constructs of VHDL -- Concurrent signal assignment statements of VHDL -- Sequential statements of VHDL -- Synthesis of VHDL code -- Combinational circuit design : practice -- Sequential circuit design : principle -- Sequential circuit design : practice -- Finite state machine : principle and practice -- Register transfer methodology : principle -- Register transfer methodology : practice -- Hierarchical design in VHDL -- Parameterized design : principle -- Parameterized design : practice -- Clock and synchronization : principle and practice |
Beschreibung: | 1 Online-Ressource (xxiii, 669 pages) |
ISBN: | 0471720925 047178639X 0471786411 9780471720928 9780471786399 9780471786412 |
Internformat
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100 | 1 | |a Chu, Pong P. |e Verfasser |4 aut | |
245 | 1 | 0 | |a RTL hardware design using VHDL |b coding for efficiency, portability, and scalability |c Pong P. Chu |
264 | 1 | |a Hoboken, N.J. |b Wiley-Interscience |c ©2006 | |
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650 | 4 | |a Datenverarbeitung | |
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Datensatz im Suchindex
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any_adam_object | |
author | Chu, Pong P. |
author_facet | Chu, Pong P. |
author_role | aut |
author_sort | Chu, Pong P. |
author_variant | p p c pp ppc |
building | Verbundindex |
bvnumber | BV043090503 |
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dewey-full | 621.39/2 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.39/2 |
dewey-search | 621.39/2 |
dewey-sort | 3621.39 12 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
format | Electronic eBook |
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institution | BVB |
isbn | 0471720925 047178639X 0471786411 9780471720928 9780471786399 9780471786412 |
language | English |
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physical | 1 Online-Ressource (xxiii, 669 pages) |
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spelling | Chu, Pong P. Verfasser aut RTL hardware design using VHDL coding for efficiency, portability, and scalability Pong P. Chu Hoboken, N.J. Wiley-Interscience ©2006 1 Online-Ressource (xxiii, 669 pages) txt rdacontent c rdamedia cr rdacarrier Includes bibliographical references (pages 665-666) and index Introduction to digital system design -- Overview of hardware description languages -- Basic language constructs of VHDL -- Concurrent signal assignment statements of VHDL -- Sequential statements of VHDL -- Synthesis of VHDL code -- Combinational circuit design : practice -- Sequential circuit design : principle -- Sequential circuit design : practice -- Finite state machine : principle and practice -- Register transfer methodology : principle -- Register transfer methodology : practice -- Hierarchical design in VHDL -- Parameterized design : principle -- Parameterized design : practice -- Clock and synchronization : principle and practice Digital electronics / Data processing VHDL (Computer hardware description language) Registers (Computers) COMPUTERS / Machine Theory bisacsh COMPUTERS / Computer Engineering bisacsh COMPUTERS / Hardware / General bisacsh Datenverarbeitung Digital electronics Data processing VHDL (DE-588)4254792-1 gnd rswk-swf VHDL (DE-588)4254792-1 s 1\p DE-604 http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=158127 Aggregator Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
spellingShingle | Chu, Pong P. RTL hardware design using VHDL coding for efficiency, portability, and scalability Digital electronics / Data processing VHDL (Computer hardware description language) Registers (Computers) COMPUTERS / Machine Theory bisacsh COMPUTERS / Computer Engineering bisacsh COMPUTERS / Hardware / General bisacsh Datenverarbeitung Digital electronics Data processing VHDL (DE-588)4254792-1 gnd |
subject_GND | (DE-588)4254792-1 |
title | RTL hardware design using VHDL coding for efficiency, portability, and scalability |
title_auth | RTL hardware design using VHDL coding for efficiency, portability, and scalability |
title_exact_search | RTL hardware design using VHDL coding for efficiency, portability, and scalability |
title_full | RTL hardware design using VHDL coding for efficiency, portability, and scalability Pong P. Chu |
title_fullStr | RTL hardware design using VHDL coding for efficiency, portability, and scalability Pong P. Chu |
title_full_unstemmed | RTL hardware design using VHDL coding for efficiency, portability, and scalability Pong P. Chu |
title_short | RTL hardware design using VHDL |
title_sort | rtl hardware design using vhdl coding for efficiency portability and scalability |
title_sub | coding for efficiency, portability, and scalability |
topic | Digital electronics / Data processing VHDL (Computer hardware description language) Registers (Computers) COMPUTERS / Machine Theory bisacsh COMPUTERS / Computer Engineering bisacsh COMPUTERS / Hardware / General bisacsh Datenverarbeitung Digital electronics Data processing VHDL (DE-588)4254792-1 gnd |
topic_facet | Digital electronics / Data processing VHDL (Computer hardware description language) Registers (Computers) COMPUTERS / Machine Theory COMPUTERS / Computer Engineering COMPUTERS / Hardware / General Datenverarbeitung Digital electronics Data processing VHDL |
url | http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=158127 |
work_keys_str_mv | AT chupongp rtlhardwaredesignusingvhdlcodingforefficiencyportabilityandscalability |