The design warrior's guide to FPGAs: devices, tools and flows
Gespeichert in:
| 1. Verfasser: | |
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| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Boston
Newnes
©2004
|
| Schlagworte: | |
| Online-Zugang: | FAW01 FAW02 Volltext |
| Beschreibung: | Includes index Field Programmable Gate Arrays (FPGAs) are devices that provide a fast, low-cost way for embedded system designers to customize products and deliver new versions with upgraded features, because they can handle very complicated functions, and be reconfigured an infinite number of times. In addition to introducing the various architectural features available in the latest generation of FPGAs, The Design Warriors Guide to FPGAs also covers different design tools and flows. This book covers information ranging from schematic-driven entry, through traditional HDL/RTL-based simulation and logic synthesis, all the way up to the current state-of-the-art in pure C/C++ design capture and synthesis technology. Also discussed are specialist areas such as mixed hardward/software and DSP-based design flows, along with innovative new devices such as field programmable node arrays (FPNAs). Clive "Max" Maxfield is a bestselling author and engineer with a large following in the electronic design automation (EDA)and embedded systems industry. In this comprehensive book, he covers all the issues of interest to designers working with, or contemplating a move to, FPGAs in their product designs. While other books cover fragments of FPGA technology or applications this is the first to focus exclusively and comprehensively on FPGA use for embedded systems. * First book to focus exclusively and comprehensively on FPGA use in embedded designs * World-renowned best-selling author * Will help engineers get familiar and succeed with this new technology by providing much-needed advice on choosing the right FPGA for any design project Introductio; Fundamental Concepts; The Origin of FPGAs; Alternative FPGA Architectures; Programming (Configuring) an FPGA; Who Are All the Players?; FPGA Versus ASIC; HDL-Based Design Flows; Silicon Virtual Prototyping; C/C++ etc. Based Design Flows; -- DSP-Based Design Flows; Embedded Processor-Based; Modular and Incremental Design; High-Speed Design and Other PCB Considerations; Observing Internal Nodes in an FPGA; Intellectual Property; Migrating ASIC Designs to FPGAs and Vice Versa; Simulation, Synthesis, Verification, etc.; Choosing the Right Device; Gigabit Transceivers; Reconfigurable Computing; Creating an Open-Source-Based -- Design Flow; Future FPGA Developments; Appendix A: -- Signal Integrity 101;Capacitive and inductive coupling(crosstalk), Chip-level effects, Board-level effects, The evolution of delay specifications; Appendix B: Deep-Submicron Delay Effects 101, A potpourri of definitions, Alternative interconnect models, DSM delay effects -- Summary, The Ouroboras, Many-to-one implementations; Appendix C: Linear Feedback Shift Registers 101, More taps than you know what to do with, Seeding an LFSR, FIFO applications, Modifying LFSRs to sequence 2n values, Accessing the previous value, Encryption and decryption applications, -- Cyclic redundancy check applications |
| Beschreibung: | 1 Online-Ressource (xvi, 542 pages) |
| ISBN: | 0080477135 0750676043 1280745983 1417537124 9780080477138 9780750676045 9781280745980 9781417537129 |
Internformat
MARC
| LEADER | 00000nmm a2200000zc 4500 | ||
|---|---|---|---|
| 001 | BV043045022 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | cr|uuu---uuuuu | ||
| 008 | 151123s2004 |||| o||u| ||||||eng d | ||
| 020 | |a 0080477135 |9 0-08-047713-5 | ||
| 020 | |a 0750676043 |9 0-7506-7604-3 | ||
| 020 | |a 1280745983 |9 1-280-74598-3 | ||
| 020 | |a 1417537124 |c electronic bk. |9 1-4175-3712-4 | ||
| 020 | |a 9780080477138 |9 978-0-08-047713-8 | ||
| 020 | |a 9780750676045 |9 978-0-7506-7604-5 | ||
| 020 | |a 9781280745980 |9 978-1-280-74598-0 | ||
| 020 | |a 9781417537129 |c electronic bk. |9 978-1-4175-3712-9 | ||
| 035 | |a (OCoLC)162592346 | ||
| 035 | |a (DE-599)BVBBV043045022 | ||
| 040 | |a DE-604 |b ger |e aacr | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-1046 |a DE-1047 | ||
| 082 | 0 | |a 621.39/5 |2 22 | |
| 100 | 1 | |a Maxfield, Clive |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a The design warrior's guide to FPGAs |b devices, tools and flows |c Clive "Max" Maxfield |
| 264 | 1 | |a Boston |b Newnes |c ©2004 | |
| 300 | |a 1 Online-Ressource (xvi, 542 pages) | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b c |2 rdamedia | ||
| 338 | |b cr |2 rdacarrier | ||
| 500 | |a Includes index | ||
| 500 | |a Field Programmable Gate Arrays (FPGAs) are devices that provide a fast, low-cost way for embedded system designers to customize products and deliver new versions with upgraded features, because they can handle very complicated functions, and be reconfigured an infinite number of times. In addition to introducing the various architectural features available in the latest generation of FPGAs, The Design Warriors Guide to FPGAs also covers different design tools and flows. This book covers information ranging from schematic-driven entry, through traditional HDL/RTL-based simulation and logic synthesis, all the way up to the current state-of-the-art in pure C/C++ design capture and synthesis technology. Also discussed are specialist areas such as mixed hardward/software and DSP-based design flows, along with innovative new devices such as field programmable node arrays (FPNAs). Clive "Max" Maxfield is a bestselling author and engineer with a large following in the electronic design automation (EDA)and embedded systems industry. In this comprehensive book, he covers all the issues of interest to designers working with, or contemplating a move to, FPGAs in their product designs. While other books cover fragments of FPGA technology or applications this is the first to focus exclusively and comprehensively on FPGA use for embedded systems. * First book to focus exclusively and comprehensively on FPGA use in embedded designs * World-renowned best-selling author * Will help engineers get familiar and succeed with this new technology by providing much-needed advice on choosing the right FPGA for any design project | ||
| 500 | |a Introductio; Fundamental Concepts; The Origin of FPGAs; Alternative FPGA Architectures; Programming (Configuring) an FPGA; Who Are All the Players?; FPGA Versus ASIC; HDL-Based Design Flows; Silicon Virtual Prototyping; C/C++ etc. Based Design Flows; -- DSP-Based Design Flows; Embedded Processor-Based; Modular and Incremental Design; High-Speed Design and Other PCB Considerations; Observing Internal Nodes in an FPGA; Intellectual Property; Migrating ASIC Designs to FPGAs and Vice Versa; Simulation, Synthesis, Verification, etc.; Choosing the Right Device; Gigabit Transceivers; Reconfigurable Computing; Creating an Open-Source-Based -- Design Flow; Future FPGA Developments; Appendix A: -- Signal Integrity 101;Capacitive and inductive coupling(crosstalk), Chip-level effects, Board-level effects, The evolution of delay specifications; Appendix B: Deep-Submicron Delay Effects 101, A potpourri of definitions, Alternative interconnect models, DSM delay effects -- Summary, The Ouroboras, Many-to-one implementations; Appendix C: Linear Feedback Shift Registers 101, More taps than you know what to do with, Seeding an LFSR, FIFO applications, Modifying LFSRs to sequence 2n values, Accessing the previous value, Encryption and decryption applications, -- Cyclic redundancy check applications | ||
| 650 | 4 | |a Field programmable gate arrays | |
| 650 | 4 | |a Réseaux logiques programmables par l'utilisateur | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. |2 bisacsh | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic |2 bisacsh | |
| 650 | 7 | |a COMPUTERS / Logic Design |2 bisacsh | |
| 650 | 7 | |a Arquitetura e organização de computadores |2 larpcal | |
| 650 | 7 | |a Eletrônica digital |2 larpcal | |
| 650 | 7 | |a Réseau logique programmable par l'utilisateur |2 rasuqam | |
| 650 | 7 | |a Circuit intégré à application spécifique |2 rasuqam | |
| 650 | 7 | |a Field programmable gate arrays |2 fast | |
| 650 | 4 | |a Field programmable gate arrays | |
| 650 | 0 | 7 | |a Schaltungsentwurf |0 (DE-588)4179389-4 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Field programmable gate array |0 (DE-588)4347749-5 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a Field programmable gate array |0 (DE-588)4347749-5 |D s |
| 689 | 0 | 1 | |a Schaltungsentwurf |0 (DE-588)4179389-4 |D s |
| 689 | 0 | |8 1\p |5 DE-604 | |
| 856 | 4 | 0 | |u http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=114170 |x Aggregator |3 Volltext |
| 912 | |a ZDB-4-EBA | ||
| 999 | |a oai:aleph.bib-bvb.de:BVB01-028469560 | ||
| 883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
| 966 | e | |u http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=114170 |l FAW01 |p ZDB-4-EBA |q FAW_PDA_EBA |x Aggregator |3 Volltext | |
| 966 | e | |u http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=114170 |l FAW02 |p ZDB-4-EBA |q FAW_PDA_EBA |x Aggregator |3 Volltext | |
Datensatz im Suchindex
| _version_ | 1804175411451527168 |
|---|---|
| any_adam_object | |
| author | Maxfield, Clive |
| author_facet | Maxfield, Clive |
| author_role | aut |
| author_sort | Maxfield, Clive |
| author_variant | c m cm |
| building | Verbundindex |
| bvnumber | BV043045022 |
| collection | ZDB-4-EBA |
| ctrlnum | (OCoLC)162592346 (DE-599)BVBBV043045022 |
| dewey-full | 621.39/5 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/5 |
| dewey-search | 621.39/5 |
| dewey-sort | 3621.39 15 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Electronic eBook |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>05693nmm a2200637zc 4500</leader><controlfield tag="001">BV043045022</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">151123s2004 |||| o||u| ||||||eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0080477135</subfield><subfield code="9">0-08-047713-5</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0750676043</subfield><subfield code="9">0-7506-7604-3</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">1280745983</subfield><subfield code="9">1-280-74598-3</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">1417537124</subfield><subfield code="c">electronic bk.</subfield><subfield code="9">1-4175-3712-4</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9780080477138</subfield><subfield code="9">978-0-08-047713-8</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9780750676045</subfield><subfield code="9">978-0-7506-7604-5</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781280745980</subfield><subfield code="9">978-1-280-74598-0</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781417537129</subfield><subfield code="c">electronic bk.</subfield><subfield code="9">978-1-4175-3712-9</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)162592346</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV043045022</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">aacr</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-1046</subfield><subfield code="a">DE-1047</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.39/5</subfield><subfield code="2">22</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Maxfield, Clive</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">The design warrior's guide to FPGAs</subfield><subfield code="b">devices, tools and flows</subfield><subfield code="c">Clive "Max" Maxfield</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boston</subfield><subfield code="b">Newnes</subfield><subfield code="c">©2004</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 Online-Ressource (xvi, 542 pages)</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Includes index</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Field Programmable Gate Arrays (FPGAs) are devices that provide a fast, low-cost way for embedded system designers to customize products and deliver new versions with upgraded features, because they can handle very complicated functions, and be reconfigured an infinite number of times. In addition to introducing the various architectural features available in the latest generation of FPGAs, The Design Warriors Guide to FPGAs also covers different design tools and flows. This book covers information ranging from schematic-driven entry, through traditional HDL/RTL-based simulation and logic synthesis, all the way up to the current state-of-the-art in pure C/C++ design capture and synthesis technology. Also discussed are specialist areas such as mixed hardward/software and DSP-based design flows, along with innovative new devices such as field programmable node arrays (FPNAs). Clive "Max" Maxfield is a bestselling author and engineer with a large following in the electronic design automation (EDA)and embedded systems industry. In this comprehensive book, he covers all the issues of interest to designers working with, or contemplating a move to, FPGAs in their product designs. While other books cover fragments of FPGA technology or applications this is the first to focus exclusively and comprehensively on FPGA use for embedded systems. * First book to focus exclusively and comprehensively on FPGA use in embedded designs * World-renowned best-selling author * Will help engineers get familiar and succeed with this new technology by providing much-needed advice on choosing the right FPGA for any design project</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Introductio; Fundamental Concepts; The Origin of FPGAs; Alternative FPGA Architectures; Programming (Configuring) an FPGA; Who Are All the Players?; FPGA Versus ASIC; HDL-Based Design Flows; Silicon Virtual Prototyping; C/C++ etc. Based Design Flows; -- DSP-Based Design Flows; Embedded Processor-Based; Modular and Incremental Design; High-Speed Design and Other PCB Considerations; Observing Internal Nodes in an FPGA; Intellectual Property; Migrating ASIC Designs to FPGAs and Vice Versa; Simulation, Synthesis, Verification, etc.; Choosing the Right Device; Gigabit Transceivers; Reconfigurable Computing; Creating an Open-Source-Based -- Design Flow; Future FPGA Developments; Appendix A: -- Signal Integrity 101;Capacitive and inductive coupling(crosstalk), Chip-level effects, Board-level effects, The evolution of delay specifications; Appendix B: Deep-Submicron Delay Effects 101, A potpourri of definitions, Alternative interconnect models, DSM delay effects -- Summary, The Ouroboras, Many-to-one implementations; Appendix C: Linear Feedback Shift Registers 101, More taps than you know what to do with, Seeding an LFSR, FIFO applications, Modifying LFSRs to sequence 2n values, Accessing the previous value, Encryption and decryption applications, -- Cyclic redundancy check applications</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Field programmable gate arrays</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Réseaux logiques programmables par l'utilisateur</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI.</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">COMPUTERS / Logic Design</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Arquitetura e organização de computadores</subfield><subfield code="2">larpcal</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Eletrônica digital</subfield><subfield code="2">larpcal</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Réseau logique programmable par l'utilisateur</subfield><subfield code="2">rasuqam</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Circuit intégré à application spécifique</subfield><subfield code="2">rasuqam</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Field programmable gate arrays</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Field programmable gate arrays</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Schaltungsentwurf</subfield><subfield code="0">(DE-588)4179389-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Field programmable gate array</subfield><subfield code="0">(DE-588)4347749-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Field programmable gate array</subfield><subfield code="0">(DE-588)4347749-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Schaltungsentwurf</subfield><subfield code="0">(DE-588)4179389-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=114170</subfield><subfield code="x">Aggregator</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-4-EBA</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-028469560</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=114170</subfield><subfield code="l">FAW01</subfield><subfield code="p">ZDB-4-EBA</subfield><subfield code="q">FAW_PDA_EBA</subfield><subfield code="x">Aggregator</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=114170</subfield><subfield code="l">FAW02</subfield><subfield code="p">ZDB-4-EBA</subfield><subfield code="q">FAW_PDA_EBA</subfield><subfield code="x">Aggregator</subfield><subfield code="3">Volltext</subfield></datafield></record></collection> |
| id | DE-604.BV043045022 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-10T07:15:52Z |
| institution | BVB |
| isbn | 0080477135 0750676043 1280745983 1417537124 9780080477138 9780750676045 9781280745980 9781417537129 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-028469560 |
| oclc_num | 162592346 |
| open_access_boolean | |
| owner | DE-1046 DE-1047 |
| owner_facet | DE-1046 DE-1047 |
| physical | 1 Online-Ressource (xvi, 542 pages) |
| psigel | ZDB-4-EBA ZDB-4-EBA FAW_PDA_EBA |
| publishDate | 2004 |
| publishDateSearch | 2004 |
| publishDateSort | 2004 |
| publisher | Newnes |
| record_format | marc |
| spelling | Maxfield, Clive Verfasser aut The design warrior's guide to FPGAs devices, tools and flows Clive "Max" Maxfield Boston Newnes ©2004 1 Online-Ressource (xvi, 542 pages) txt rdacontent c rdamedia cr rdacarrier Includes index Field Programmable Gate Arrays (FPGAs) are devices that provide a fast, low-cost way for embedded system designers to customize products and deliver new versions with upgraded features, because they can handle very complicated functions, and be reconfigured an infinite number of times. In addition to introducing the various architectural features available in the latest generation of FPGAs, The Design Warriors Guide to FPGAs also covers different design tools and flows. This book covers information ranging from schematic-driven entry, through traditional HDL/RTL-based simulation and logic synthesis, all the way up to the current state-of-the-art in pure C/C++ design capture and synthesis technology. Also discussed are specialist areas such as mixed hardward/software and DSP-based design flows, along with innovative new devices such as field programmable node arrays (FPNAs). Clive "Max" Maxfield is a bestselling author and engineer with a large following in the electronic design automation (EDA)and embedded systems industry. In this comprehensive book, he covers all the issues of interest to designers working with, or contemplating a move to, FPGAs in their product designs. While other books cover fragments of FPGA technology or applications this is the first to focus exclusively and comprehensively on FPGA use for embedded systems. * First book to focus exclusively and comprehensively on FPGA use in embedded designs * World-renowned best-selling author * Will help engineers get familiar and succeed with this new technology by providing much-needed advice on choosing the right FPGA for any design project Introductio; Fundamental Concepts; The Origin of FPGAs; Alternative FPGA Architectures; Programming (Configuring) an FPGA; Who Are All the Players?; FPGA Versus ASIC; HDL-Based Design Flows; Silicon Virtual Prototyping; C/C++ etc. Based Design Flows; -- DSP-Based Design Flows; Embedded Processor-Based; Modular and Incremental Design; High-Speed Design and Other PCB Considerations; Observing Internal Nodes in an FPGA; Intellectual Property; Migrating ASIC Designs to FPGAs and Vice Versa; Simulation, Synthesis, Verification, etc.; Choosing the Right Device; Gigabit Transceivers; Reconfigurable Computing; Creating an Open-Source-Based -- Design Flow; Future FPGA Developments; Appendix A: -- Signal Integrity 101;Capacitive and inductive coupling(crosstalk), Chip-level effects, Board-level effects, The evolution of delay specifications; Appendix B: Deep-Submicron Delay Effects 101, A potpourri of definitions, Alternative interconnect models, DSM delay effects -- Summary, The Ouroboras, Many-to-one implementations; Appendix C: Linear Feedback Shift Registers 101, More taps than you know what to do with, Seeding an LFSR, FIFO applications, Modifying LFSRs to sequence 2n values, Accessing the previous value, Encryption and decryption applications, -- Cyclic redundancy check applications Field programmable gate arrays Réseaux logiques programmables par l'utilisateur TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic bisacsh COMPUTERS / Logic Design bisacsh Arquitetura e organização de computadores larpcal Eletrônica digital larpcal Réseau logique programmable par l'utilisateur rasuqam Circuit intégré à application spécifique rasuqam Field programmable gate arrays fast Schaltungsentwurf (DE-588)4179389-4 gnd rswk-swf Field programmable gate array (DE-588)4347749-5 gnd rswk-swf Field programmable gate array (DE-588)4347749-5 s Schaltungsentwurf (DE-588)4179389-4 s 1\p DE-604 http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=114170 Aggregator Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Maxfield, Clive The design warrior's guide to FPGAs devices, tools and flows Field programmable gate arrays Réseaux logiques programmables par l'utilisateur TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic bisacsh COMPUTERS / Logic Design bisacsh Arquitetura e organização de computadores larpcal Eletrônica digital larpcal Réseau logique programmable par l'utilisateur rasuqam Circuit intégré à application spécifique rasuqam Field programmable gate arrays fast Schaltungsentwurf (DE-588)4179389-4 gnd Field programmable gate array (DE-588)4347749-5 gnd |
| subject_GND | (DE-588)4179389-4 (DE-588)4347749-5 |
| title | The design warrior's guide to FPGAs devices, tools and flows |
| title_auth | The design warrior's guide to FPGAs devices, tools and flows |
| title_exact_search | The design warrior's guide to FPGAs devices, tools and flows |
| title_full | The design warrior's guide to FPGAs devices, tools and flows Clive "Max" Maxfield |
| title_fullStr | The design warrior's guide to FPGAs devices, tools and flows Clive "Max" Maxfield |
| title_full_unstemmed | The design warrior's guide to FPGAs devices, tools and flows Clive "Max" Maxfield |
| title_short | The design warrior's guide to FPGAs |
| title_sort | the design warrior s guide to fpgas devices tools and flows |
| title_sub | devices, tools and flows |
| topic | Field programmable gate arrays Réseaux logiques programmables par l'utilisateur TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic bisacsh COMPUTERS / Logic Design bisacsh Arquitetura e organização de computadores larpcal Eletrônica digital larpcal Réseau logique programmable par l'utilisateur rasuqam Circuit intégré à application spécifique rasuqam Field programmable gate arrays fast Schaltungsentwurf (DE-588)4179389-4 gnd Field programmable gate array (DE-588)4347749-5 gnd |
| topic_facet | Field programmable gate arrays Réseaux logiques programmables par l'utilisateur TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic COMPUTERS / Logic Design Arquitetura e organização de computadores Eletrônica digital Réseau logique programmable par l'utilisateur Circuit intégré à application spécifique Schaltungsentwurf Field programmable gate array |
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| work_keys_str_mv | AT maxfieldclive thedesignwarriorsguidetofpgasdevicestoolsandflows |