Networks on chips: technology and tools
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Bibliographische Detailangaben
1. Verfasser: Benini, Luca (VerfasserIn)
Format: Elektronisch E-Book
Sprache:English
Veröffentlicht: Amsterdam Elsevier Morgan Kaufmann Publishers c2006
Schriftenreihe:Morgan Kaufmann series in systems on silicon
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Online-Zugang:FAW01
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Beschreibung:Includes bibliographical references and index
Networks on chip -- Network architecture : principles and examples -- Physical network layer -- The data-link layer in NoC design -- Network and transport layers in networks on chip -- Network interface architecture and design issues -- NoC programming -- Design methodologies and CAD tool flows for NoCs -- Designs and implementations of NoC-based SoCs
The design of today's semiconductor chips for various applications, such as telecommunications, poses various challenges due to the complexity of these systems. These highly complex systems-on-chips demand new approaches to connect and manage the communication between on-chip processing and storage components and networks on chips (NoCs) provide a powerful solution. This book is the first to provide a unified overview of NoC technology. It includes in-depth analysis of all the on-chip communication challenges, from physical wiring implementation up to software architecture, and a complete classification of their various Network-on-Chip approaches and solutions. * Leading-edge research from world-renowned experts in academia and industry with state-of-the-art technology implementations/trends * An integrated presentation not currently available in any other book * A thorough introduction to current design methodologies and chips designed with NoCs
Beschreibung:1 Online-Ressource (x, 395 p.)
ISBN:0080473563
0123705215
9780080473567
9780123705211

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