Verfügbarkeit: Applied Reconfigurable Computing

Applied Reconfigurable Computing: 11th International Symposium, ARC 2015, Bochum, Germany, April 13-17, 2015, Proceedings

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Bibliographische Detailangaben
Format:	Elektronisch Tagungsbericht E-Book
Sprache:	English
Veröffentlicht:	Cham Springer 2015
Schriftenreihe:	Lecture Notes in Computer Science 9040
Schlagworte:	Field programmable gate array Computerarchitektur Rekonfiguration Konferenzschrift > 2015 > Bochum
Online-Zugang:	Volltext Inhaltsverzeichnis Abstract
Beschreibung:	1 Online-Ressource (XVIII, 557 p. 257 illus)
ISBN:	9783319162140 9783319162133
ISSN:	0302-9743
DOI:	10.1007/978-3-319-16214-0

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Datensatz im Suchindex

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adam_text	APPLIED RECONFIGURABLE COMPUTING / SANO, KENTARO : 2015 TABLE OF CONTENTS / INHALTSVERZEICHNIS ARCHITECTURE AND MODELING REDUCING STORAGE COSTS OF RECONFIGURATION CONTEXTS BY SHARING INSTRUCTION MEMORY CACHE BLOCKS A VECTOR CACHING SCHEME FOR STREAMING FPGA SPMV ACCELERATORS HIERARCHICAL DYNAMIC POWER-GATING IN FPGAS TOOLS AND COMPILERS HARDWARE SYNTHESIS FROM FUNCTIONAL EMBEDDED DOMAIN-SPECIFIC LANGUAGES: A CASE STUDY IN REGULAR EXPRESSION COMPILATION ARCHHDL: A NOVEL HARDWARE RTL DESIGN ENVIRONMENT IN C++ OPERAND-VALUE-BASED MODELING OF DYNAMIC ENERGY CONSUMPTION OF SOFT PROCESSORS IN FPGA SYSTEMS AND APPLICATIONS PREEMPTIVE HARDWARE MULTITASKING IN RECONOS A FULLY PARALLEL PARTICLE FILTER ARCHITECTURE FOR FPGAS TEACHER: TEACH ADVANCED RECONFIGURABLE ARCHITECTURES AND TOOLS TOOLS AND COMPILERS DYNAMIC MEMORY MANAGEMENT IN VIVADO-HLS FOR SCALABLE MANY-ACCELERATOR ARCHITECTURES SET-PAR: PLACE AND ROUTE TOOLS FOR THE MITIGATION OF SINGLE EVENT TRANSIENTS ON FLASH-BASED FPGAS ADVANCED SYSTEMC TRACING AND ANALYSIS FRAMEWORK FOR EXTRA-FUNCTIONAL PROPERTIES RUN-TIME PARTIAL RECONFIGURATION SIMULATION FRAMEWORK BASED ON DYNAMICALLY LOADABLE COMPONENTS NETWORK-ON-A-CHIP ARCHITECTURE VIRTUALIZATION FOR RUN-TIME HARDWARE MULTITHREADING ON FIELD PROGRAMMABLE GATE ARRAYS CENTRALIZED AND SOFTWARE-BASED RUN-TIME TRAFFIC MANAGEMENT INSIDE CONFIGURABLE REGIONS OF INTEREST IN MESH-BASED NETWORKS-ON-CHIP SURVEY ON REAL-TIME NETWORK-ON-CHIP ARCHITECTURES CRYPTOGRAPHY APPLICATIONS EFFICIENT SR-LATCH PUF HARDWARE BENCHMARKING OF CRYPTOGRAPHIC ALGORITHMS USING HIGH-LEVEL SYNTHESIS TOOLS: THE SHA-3 CONTEST CASE STUDY DUAL CLEFIA/AES CIPHER CORE ON FPGA SYSTEMS AND APPLICATIONS AN EFFICIENT AND FLEXIBLE FPGA IMPLEMENTATION OF A FACE DETECTION SYSTEM A FLEXIBLE SOFTWARE FRAMEWORK FOR DYNAMIC TASK ALLOCATION ON MPSOCS EVALUATED IN AN AUTOMOTIVE CONTEXT A DYNAMICALLY RECONFIGURABLE MIXED ANALOG-DIGITAL FILTER BANK THE EFFECTS OF SYSTEM HYPER PIPELINING ON THREE COMPUTATIONAL BENCHMARKS USING FPGAS EXTENDED ABSTRACTS (POSTERS) A TIMING DRIVEN CYCLE-ACCURATE SIMULATION FOR COARSE-GRAINED RECONFIGURABLE ARCHITECTURES SCALABLE AND EFFICIENT LINEAR ALGEBRA KERNEL MAPPING FOR LOW ENERGY CONSUMPTION ON THE LAYERS CGRA. A NOVEL CONCEPT FOR ADAPTIVE SIGNAL PROCESSING ON RECONFIGURABLE HARDWARE EVALUATION OF HIGH-LEVEL SYNTHESIS TECHNIQUES FOR MEMORY AND DATAPATH TRADEOFFS IN FPGA BASED SOC ARCHITECTURES MEASURING FAILURE PROBABILITY OF COARSE AND FINE GRAIN TMR SCHEMES IN SRAM-BASED FPGAS UNDER NEUTRON-INDUCED EFFECTS MODULAR ACQUISITION AND STIMULATION SYSTEM FOR TIMESTAMP-DRIVEN NEUROSCIENCE EXPERIMENTS DRAM ROW ACTIVATION ENERGY OPTIMIZATION FOR STRIDE MEMORY ACCESS ON FPGA-BASED SYSTEMS ACCELERATION OF DATA STREAMING CLASSIFICATION USING RECONFIGURABLE TECHNOLOGY ON-THE-FLY VERIFICATION OF RECONFIGURABLE IMAGE PROCESSING MODULES BASED ON A PROOF-CARRYING HARDWARE APPROACH PARTIAL RECONFIGURATION FOR DYNAMIC MAPPING OF TASK GRAPHS ONTO 2D MESH PLATFORM A CHALLENGE OF PORTABLE AND HIGH-SPEED FPGA ACCELERATOR TOTAL IONIZING DOSE EFFECTS OF OPTICAL COMPONENTS ON AN OPTICALLY RECONFIGURABLE GATE ARRAY EXPLORING DYNAMIC RECONFIGURABLE CORDIC CO-PROCESSORS TIGHTLY COUPLED WITH A VLIW-SIMD SOFT-PROCESSOR ARCHITECTURE MESH OF CLUSTERS FPGA ARCHITECTURES: EXPLORATION METHODOLOGY AND INTERCONNECT OPTIMIZATION DYAFNOC: DYNAMICALLY RECONFIGURABLE NOC CHARACTERIZATION USING A SIMPLE ADAPTIVE DEADLOCK-FREE ROUTING ALGORITHM WITH A LOW IMPLEMENTATION COST A FLEXIBLE MULTILAYER PERCEPTRON CO-PROCESSOR FOR FPGAS RECONFIGURABLE HARDWARE ASSIST FOR LINUX PROCESS SCHEDULING IN HETEROGENEOUS MULTICORE SOCS TOWARDS PERFORMANCE MODELING OF 3D MEMORY INTEGRATED FPGA ARCHITECTURES PYVERILOG: A PYTHON-BASED HARDWARE DESIGN PROCESSING TOOLKIT FOR VERILOG HDL SPECIAL SESSION 1: FUNDED R&D RUNNING AND COMPLETED PROJECTS (INVITED PAPERS) TOWARDS UNIFICATION OF ACCELERATED COMPUTING AND INTERCONNECTION FOR EXTREME-SCALE COMPUTING SPARTAN/SEXTANT/COMPASS: ADVANCING SPACE ROVER VISION VIA RECONFIGURABLE PLATFORMS HARDWARE TASK SCHEDULING FOR PARTIALLY RECONFIGURABLE FPGAS SWAN-ICARE PROJECT: ON THE EFFICIENCY OF FPGAS EMULATING WEARABLE MEDICAL DEVICES FOR WOUND MANAGEMENT AND MONITORING SPECIAL SESSION 2: HORIZON 2020 FUNDED PROJECTS (INVITED PAPERS) DYNAMIA: DYNAMIC HARDWARE RECONFIGURATION IN INDUSTRIAL APPLICATIONS ROBOTS IN ASSISTED LIVING ENVIRONMENTS AS AN UNOBTRUSIVE, EFFICIENT, RELIABLE AND MODULAR SOLUTION FOR INDEPENDENT AGEING: THE RADIO PERSPECTIVE RECONFIGURABLE COMPUTING FOR ANALYTICS ACCELERATION OF BIG BIO-DATA: THE AEGLE APPROACH COSSIM : A NOVEL, COMPREHENSIBLE, ULTRA-FAST, SECURITY-AWARE CPS SIMULATOR DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT. APPLIED RECONFIGURABLE COMPUTING / SANO, KENTARO : 2015 ABSTRACT / INHALTSTEXT THIS BOOK CONSTITUTES THE REFEREED PROCEEDINGS OF THE 11TH INTERNATIONAL SYMPOSIUM ON APPLIED RECONFIGURABLE COMPUTING, ARC 2015, HELD IN BOCHUM, GERMANY, IN APRIL 2015. THE 23 FULL PAPERS AND 20 SHORT PAPERS PRESENTED IN THIS VOLUME WERE CAREFULLY REVIEWED AND SELECTED FROM 85 SUBMISSIONS. THEY ARE ORGANIZED IN TOPICAL HEADINGS NAMED: ARCHITECTURE AND MODELING; TOOLS AND COMPILERS; SYSTEMS AND APPLICATIONS; NETWORK-ON-A-CHIP; CRYPTOGRAPHY APPLICATIONS; EXTENDED ABSTRACTS OF POSTERS. IN ADDITION, THE BOOK CONTAINS INVITED PAPERS ON FUNDED R&D - RUNNING AND COMPLETED PROJECTS AND HORIZON 2020 FUNDED PROJECTS DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT.
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spelling	Applied Reconfigurable Computing 11th International Symposium, ARC 2015, Bochum, Germany, April 13-17, 2015, Proceedings edited by Kentaro Sano, Dimitrios Soudris, Michael Hübner, Pedro C. Diniz Cham Springer 2015 1 Online-Ressource (XVIII, 557 p. 257 illus) txt rdacontent c rdamedia cr rdacarrier Lecture Notes in Computer Science 9040 0302-9743 Field programmable gate array (DE-588)4347749-5 gnd rswk-swf Computerarchitektur (DE-588)4048717-9 gnd rswk-swf Rekonfiguration (DE-588)4306238-6 gnd rswk-swf (DE-588)1071861417 Konferenzschrift 2015 Bochum gnd-content Rekonfiguration (DE-588)4306238-6 s Computerarchitektur (DE-588)4048717-9 s Field programmable gate array (DE-588)4347749-5 s DE-604 Sano, Kentaro Sonstige oth ARC 11. 2015 Bochum Sonstige (DE-588)1069219134 oth Lecture Notes in Computer Science 9040 (DE-604)BV014880109 9040 https://doi.org/10.1007/978-3-319-16214-0 Verlag Volltext Springer Fremddatenuebernahme application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=027916867&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis Springer Fremddatenuebernahme application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=027916867&sequence=000003&line_number=0002&func_code=DB_RECORDS&service_type=MEDIA Abstract
spellingShingle	Applied Reconfigurable Computing 11th International Symposium, ARC 2015, Bochum, Germany, April 13-17, 2015, Proceedings Lecture Notes in Computer Science Field programmable gate array (DE-588)4347749-5 gnd Computerarchitektur (DE-588)4048717-9 gnd Rekonfiguration (DE-588)4306238-6 gnd
subject_GND	(DE-588)4347749-5 (DE-588)4048717-9 (DE-588)4306238-6 (DE-588)1071861417
title	Applied Reconfigurable Computing 11th International Symposium, ARC 2015, Bochum, Germany, April 13-17, 2015, Proceedings
title_auth	Applied Reconfigurable Computing 11th International Symposium, ARC 2015, Bochum, Germany, April 13-17, 2015, Proceedings
title_exact_search	Applied Reconfigurable Computing 11th International Symposium, ARC 2015, Bochum, Germany, April 13-17, 2015, Proceedings
title_full	Applied Reconfigurable Computing 11th International Symposium, ARC 2015, Bochum, Germany, April 13-17, 2015, Proceedings edited by Kentaro Sano, Dimitrios Soudris, Michael Hübner, Pedro C. Diniz
title_fullStr	Applied Reconfigurable Computing 11th International Symposium, ARC 2015, Bochum, Germany, April 13-17, 2015, Proceedings edited by Kentaro Sano, Dimitrios Soudris, Michael Hübner, Pedro C. Diniz
title_full_unstemmed	Applied Reconfigurable Computing 11th International Symposium, ARC 2015, Bochum, Germany, April 13-17, 2015, Proceedings edited by Kentaro Sano, Dimitrios Soudris, Michael Hübner, Pedro C. Diniz
title_short	Applied Reconfigurable Computing
title_sort	applied reconfigurable computing 11th international symposium arc 2015 bochum germany april 13 17 2015 proceedings
title_sub	11th International Symposium, ARC 2015, Bochum, Germany, April 13-17, 2015, Proceedings
topic	Field programmable gate array (DE-588)4347749-5 gnd Computerarchitektur (DE-588)4048717-9 gnd Rekonfiguration (DE-588)4306238-6 gnd
topic_facet	Field programmable gate array Computerarchitektur Rekonfiguration Konferenzschrift 2015 Bochum
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volume_link	(DE-604)BV014880109
work_keys_str_mv	AT sanokentaro appliedreconfigurablecomputing11thinternationalsymposiumarc2015bochumgermanyapril13172015proceedings AT arcbochum appliedreconfigurablecomputing11thinternationalsymposiumarc2015bochumgermanyapril13172015proceedings

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