VLSI Planarization: Methods, Models, Implementation
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Dordrecht
Springer Netherlands
1997
|
| Schriftenreihe: | Mathematics and Its Applications
399 |
| Schlagworte: | |
| Online-Zugang: | Volltext |
| Beschreibung: | At the beginning we would like to introduce a refinement. The term 'VLSI planarization' means planarization of a circuit of VLSI, Le. the embedding of a VLSI circuit in the plane by different criteria such as the minimum number of connectors, the minimum total length of connectors, the minimum number of over-the-element routes, etc. A connector is designed to connect the broken sections of a net. It can be implemented in different ways depending on the technology. Connectors for a bipolar VLSI are implemented by diffused tun nels, for instance. By over-the-element route we shall mean a connection which intersects the enclosing rectangle of an element (or a cell). The possibility of the construction such connections during circuit planarization is reflected in element models and can be ensured, for example, by the availability of areas within the rectangles where connections may be routed. VLSI planarization is one of the basic stages (others will be discussed below) of the so called topological (in the mathematical sense) approach to VLSI design. This approach does not lie in the direction of the classical approach to automation of VLSI layout design. In the classical approach to computer aided design the placement and routing problems are solved successively. The topological approach, in contrast, allows one to solve both problems at the same time. This is achieved by constructing a planar embedding of a circuit and obtaining the proper VLSI layout on the basis of it |
| Beschreibung: | 1 Online-Ressource (VI, 186 p) |
| ISBN: | 9789401157407 9789401064217 |
| DOI: | 10.1007/978-94-011-5740-7 |
Internformat
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| 245 | 1 | 0 | |a VLSI Planarization |b Methods, Models, Implementation |c by V. Feinberg, A. Levin, E. Rabinovich |
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| 500 | |a At the beginning we would like to introduce a refinement. The term 'VLSI planarization' means planarization of a circuit of VLSI, Le. the embedding of a VLSI circuit in the plane by different criteria such as the minimum number of connectors, the minimum total length of connectors, the minimum number of over-the-element routes, etc. A connector is designed to connect the broken sections of a net. It can be implemented in different ways depending on the technology. Connectors for a bipolar VLSI are implemented by diffused tun nels, for instance. By over-the-element route we shall mean a connection which intersects the enclosing rectangle of an element (or a cell). The possibility of the construction such connections during circuit planarization is reflected in element models and can be ensured, for example, by the availability of areas within the rectangles where connections may be routed. VLSI planarization is one of the basic stages (others will be discussed below) of the so called topological (in the mathematical sense) approach to VLSI design. This approach does not lie in the direction of the classical approach to automation of VLSI layout design. In the classical approach to computer aided design the placement and routing problems are solved successively. The topological approach, in contrast, allows one to solve both problems at the same time. This is achieved by constructing a planar embedding of a circuit and obtaining the proper VLSI layout on the basis of it | ||
| 650 | 4 | |a Engineering | |
| 650 | 4 | |a Information theory | |
| 650 | 4 | |a Computational complexity | |
| 650 | 4 | |a Electronic data processing | |
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Datensatz im Suchindex
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| dewey-full | 621.3 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
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| dewey-search | 621.3 |
| dewey-sort | 3621.3 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Mathematik Elektrotechnik / Elektronik / Nachrichtentechnik |
| doi_str_mv | 10.1007/978-94-011-5740-7 |
| format | Electronic eBook |
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| id | DE-604.BV042423995 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-10T01:21:14Z |
| institution | BVB |
| isbn | 9789401157407 9789401064217 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-027859412 |
| oclc_num | 863674356 |
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| physical | 1 Online-Ressource (VI, 186 p) |
| psigel | ZDB-2-SMA ZDB-2-BAE ZDB-2-SMA_Archive |
| publishDate | 1997 |
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| publisher | Springer Netherlands |
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| series2 | Mathematics and Its Applications |
| spelling | Feinberg, V. Verfasser aut VLSI Planarization Methods, Models, Implementation by V. Feinberg, A. Levin, E. Rabinovich Dordrecht Springer Netherlands 1997 1 Online-Ressource (VI, 186 p) txt rdacontent c rdamedia cr rdacarrier Mathematics and Its Applications 399 At the beginning we would like to introduce a refinement. The term 'VLSI planarization' means planarization of a circuit of VLSI, Le. the embedding of a VLSI circuit in the plane by different criteria such as the minimum number of connectors, the minimum total length of connectors, the minimum number of over-the-element routes, etc. A connector is designed to connect the broken sections of a net. It can be implemented in different ways depending on the technology. Connectors for a bipolar VLSI are implemented by diffused tun nels, for instance. By over-the-element route we shall mean a connection which intersects the enclosing rectangle of an element (or a cell). The possibility of the construction such connections during circuit planarization is reflected in element models and can be ensured, for example, by the availability of areas within the rectangles where connections may be routed. VLSI planarization is one of the basic stages (others will be discussed below) of the so called topological (in the mathematical sense) approach to VLSI design. This approach does not lie in the direction of the classical approach to automation of VLSI layout design. In the classical approach to computer aided design the placement and routing problems are solved successively. The topological approach, in contrast, allows one to solve both problems at the same time. This is achieved by constructing a planar embedding of a circuit and obtaining the proper VLSI layout on the basis of it Engineering Information theory Computational complexity Electronic data processing Algorithms Computer engineering Electrical Engineering Computing Methodologies Discrete Mathematics in Computer Science Theory of Computation Datenverarbeitung Ingenieurwissenschaften Levin, A. Sonstige oth Rabinovich, E. Sonstige oth https://doi.org/10.1007/978-94-011-5740-7 Verlag Volltext |
| spellingShingle | Feinberg, V. VLSI Planarization Methods, Models, Implementation Engineering Information theory Computational complexity Electronic data processing Algorithms Computer engineering Electrical Engineering Computing Methodologies Discrete Mathematics in Computer Science Theory of Computation Datenverarbeitung Ingenieurwissenschaften |
| title | VLSI Planarization Methods, Models, Implementation |
| title_auth | VLSI Planarization Methods, Models, Implementation |
| title_exact_search | VLSI Planarization Methods, Models, Implementation |
| title_full | VLSI Planarization Methods, Models, Implementation by V. Feinberg, A. Levin, E. Rabinovich |
| title_fullStr | VLSI Planarization Methods, Models, Implementation by V. Feinberg, A. Levin, E. Rabinovich |
| title_full_unstemmed | VLSI Planarization Methods, Models, Implementation by V. Feinberg, A. Levin, E. Rabinovich |
| title_short | VLSI Planarization |
| title_sort | vlsi planarization methods models implementation |
| title_sub | Methods, Models, Implementation |
| topic | Engineering Information theory Computational complexity Electronic data processing Algorithms Computer engineering Electrical Engineering Computing Methodologies Discrete Mathematics in Computer Science Theory of Computation Datenverarbeitung Ingenieurwissenschaften |
| topic_facet | Engineering Information theory Computational complexity Electronic data processing Algorithms Computer engineering Electrical Engineering Computing Methodologies Discrete Mathematics in Computer Science Theory of Computation Datenverarbeitung Ingenieurwissenschaften |
| url | https://doi.org/10.1007/978-94-011-5740-7 |
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