Digital integrated circuit design using Verilog and SystemVerilog:
For those with a basic understanding of digital design, this book teaches the essential skills to design digital integrated circuits using Verilog and the relevant extensions of SystemVerilog. In addition to covering the syntax of Verilog and SystemVerilog, the author provides an appreciation of des...
Gespeichert in:
1. Verfasser: | |
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Format: | Buch |
Sprache: | English |
Veröffentlicht: |
2014
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Schlagworte: | |
Zusammenfassung: | For those with a basic understanding of digital design, this book teaches the essential skills to design digital integrated circuits using Verilog and the relevant extensions of SystemVerilog. In addition to covering the syntax of Verilog and SystemVerilog, the author provides an appreciation of design challenges and solutions for producing working circuits. The book covers not only the syntax and limitations of HDL coding, but deals extensively with design problems such as partitioning and synchronization, helping you to produce designs that are not only logically correct, but will actually |
Beschreibung: | "Published: September 2014" --Elsevier web site, viewed December 18, 2014 Includes bibliographical references (pages 413-449) and index |
Beschreibung: | xv, 449 pages illustrations 25 cm |
ISBN: | 9780124080591 0124080596 |
Internformat
MARC
LEADER | 00000nam a2200000 c 4500 | ||
---|---|---|---|
001 | BV042399750 | ||
003 | DE-604 | ||
005 | 20150313 | ||
007 | t | ||
008 | 150310s2014 a||| |||| 00||| eng d | ||
015 | |a GBB4B5819 |2 dnb | ||
015 | |a GBB4C0726 |2 dnb | ||
020 | |a 9780124080591 |9 978-0-12-408059-1 | ||
020 | |a 0124080596 |9 0-12-408059-6 | ||
035 | |a (OCoLC)904773822 | ||
035 | |a (DE-599)BVBBV042399750 | ||
040 | |a DE-604 |b ger |e rakwb | ||
041 | 0 | |a eng | |
049 | |a DE-573 | ||
084 | |a ZN 4904 |0 (DE-625)157419: |2 rvk | ||
084 | |a ZN 4930 |0 (DE-625)157422: |2 rvk | ||
100 | 1 | |a Mehler, Roland |e Verfasser |4 aut | |
245 | 1 | 0 | |a Digital integrated circuit design using Verilog and SystemVerilog |c Ronald Mehler |
264 | 1 | |c 2014 | |
300 | |a xv, 449 pages |b illustrations |c 25 cm | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
500 | |a "Published: September 2014" --Elsevier web site, viewed December 18, 2014 | ||
500 | |a Includes bibliographical references (pages 413-449) and index | ||
520 | |a For those with a basic understanding of digital design, this book teaches the essential skills to design digital integrated circuits using Verilog and the relevant extensions of SystemVerilog. In addition to covering the syntax of Verilog and SystemVerilog, the author provides an appreciation of design challenges and solutions for producing working circuits. The book covers not only the syntax and limitations of HDL coding, but deals extensively with design problems such as partitioning and synchronization, helping you to produce designs that are not only logically correct, but will actually | ||
650 | 4 | |a Digital integrated circuits / Design and construction | |
650 | 4 | |a Verilog (Computer hardware description language) | |
650 | 4 | |a SystemVerilog (Computer hardware description language) | |
650 | 4 | |a Integrated circuits | |
650 | 7 | |a Digital integrated circuits / Design and construction |2 fast | |
650 | 7 | |a Integrated circuits |2 fast | |
650 | 7 | |a SystemVerilog (Computer hardware description language) |2 fast | |
650 | 7 | |a Verilog (Computer hardware description language) |2 fast | |
650 | 0 | 7 | |a VERILOG |0 (DE-588)4268385-3 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Schaltungsentwurf |0 (DE-588)4179389-4 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Digitale integrierte Schaltung |0 (DE-588)4113313-4 |2 gnd |9 rswk-swf |
689 | 0 | 0 | |a Digitale integrierte Schaltung |0 (DE-588)4113313-4 |D s |
689 | 0 | 1 | |a Schaltungsentwurf |0 (DE-588)4179389-4 |D s |
689 | 0 | 2 | |a VERILOG |0 (DE-588)4268385-3 |D s |
689 | 0 | |5 DE-604 | |
999 | |a oai:aleph.bib-bvb.de:BVB01-027835460 |
Datensatz im Suchindex
_version_ | 1804153053992976384 |
---|---|
any_adam_object | |
author | Mehler, Roland |
author_facet | Mehler, Roland |
author_role | aut |
author_sort | Mehler, Roland |
author_variant | r m rm |
building | Verbundindex |
bvnumber | BV042399750 |
classification_rvk | ZN 4904 ZN 4930 |
ctrlnum | (OCoLC)904773822 (DE-599)BVBBV042399750 |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
format | Book |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>02613nam a2200529 c 4500</leader><controlfield tag="001">BV042399750</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20150313 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">150310s2014 a||| |||| 00||| eng d</controlfield><datafield tag="015" ind1=" " ind2=" "><subfield code="a">GBB4B5819</subfield><subfield code="2">dnb</subfield></datafield><datafield tag="015" ind1=" " ind2=" "><subfield code="a">GBB4C0726</subfield><subfield code="2">dnb</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9780124080591</subfield><subfield code="9">978-0-12-408059-1</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0124080596</subfield><subfield code="9">0-12-408059-6</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)904773822</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV042399750</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakwb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-573</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 4904</subfield><subfield code="0">(DE-625)157419:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 4930</subfield><subfield code="0">(DE-625)157422:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Mehler, Roland</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Digital integrated circuit design using Verilog and SystemVerilog</subfield><subfield code="c">Ronald Mehler</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="c">2014</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">xv, 449 pages</subfield><subfield code="b">illustrations</subfield><subfield code="c">25 cm</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">"Published: September 2014" --Elsevier web site, viewed December 18, 2014</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Includes bibliographical references (pages 413-449) and index</subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">For those with a basic understanding of digital design, this book teaches the essential skills to design digital integrated circuits using Verilog and the relevant extensions of SystemVerilog. In addition to covering the syntax of Verilog and SystemVerilog, the author provides an appreciation of design challenges and solutions for producing working circuits. The book covers not only the syntax and limitations of HDL coding, but deals extensively with design problems such as partitioning and synchronization, helping you to produce designs that are not only logically correct, but will actually</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Digital integrated circuits / Design and construction</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Verilog (Computer hardware description language)</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">SystemVerilog (Computer hardware description language)</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Integrated circuits</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Digital integrated circuits / Design and construction</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Integrated circuits</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">SystemVerilog (Computer hardware description language)</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Verilog (Computer hardware description language)</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VERILOG</subfield><subfield code="0">(DE-588)4268385-3</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Schaltungsentwurf</subfield><subfield code="0">(DE-588)4179389-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Digitale integrierte Schaltung</subfield><subfield code="0">(DE-588)4113313-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Digitale integrierte Schaltung</subfield><subfield code="0">(DE-588)4113313-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Schaltungsentwurf</subfield><subfield code="0">(DE-588)4179389-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="2"><subfield code="a">VERILOG</subfield><subfield code="0">(DE-588)4268385-3</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-027835460</subfield></datafield></record></collection> |
id | DE-604.BV042399750 |
illustrated | Illustrated |
indexdate | 2024-07-10T01:20:30Z |
institution | BVB |
isbn | 9780124080591 0124080596 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-027835460 |
oclc_num | 904773822 |
open_access_boolean | |
owner | DE-573 |
owner_facet | DE-573 |
physical | xv, 449 pages illustrations 25 cm |
publishDate | 2014 |
publishDateSearch | 2014 |
publishDateSort | 2014 |
record_format | marc |
spelling | Mehler, Roland Verfasser aut Digital integrated circuit design using Verilog and SystemVerilog Ronald Mehler 2014 xv, 449 pages illustrations 25 cm txt rdacontent n rdamedia nc rdacarrier "Published: September 2014" --Elsevier web site, viewed December 18, 2014 Includes bibliographical references (pages 413-449) and index For those with a basic understanding of digital design, this book teaches the essential skills to design digital integrated circuits using Verilog and the relevant extensions of SystemVerilog. In addition to covering the syntax of Verilog and SystemVerilog, the author provides an appreciation of design challenges and solutions for producing working circuits. The book covers not only the syntax and limitations of HDL coding, but deals extensively with design problems such as partitioning and synchronization, helping you to produce designs that are not only logically correct, but will actually Digital integrated circuits / Design and construction Verilog (Computer hardware description language) SystemVerilog (Computer hardware description language) Integrated circuits Digital integrated circuits / Design and construction fast Integrated circuits fast SystemVerilog (Computer hardware description language) fast Verilog (Computer hardware description language) fast VERILOG (DE-588)4268385-3 gnd rswk-swf Schaltungsentwurf (DE-588)4179389-4 gnd rswk-swf Digitale integrierte Schaltung (DE-588)4113313-4 gnd rswk-swf Digitale integrierte Schaltung (DE-588)4113313-4 s Schaltungsentwurf (DE-588)4179389-4 s VERILOG (DE-588)4268385-3 s DE-604 |
spellingShingle | Mehler, Roland Digital integrated circuit design using Verilog and SystemVerilog Digital integrated circuits / Design and construction Verilog (Computer hardware description language) SystemVerilog (Computer hardware description language) Integrated circuits Digital integrated circuits / Design and construction fast Integrated circuits fast SystemVerilog (Computer hardware description language) fast Verilog (Computer hardware description language) fast VERILOG (DE-588)4268385-3 gnd Schaltungsentwurf (DE-588)4179389-4 gnd Digitale integrierte Schaltung (DE-588)4113313-4 gnd |
subject_GND | (DE-588)4268385-3 (DE-588)4179389-4 (DE-588)4113313-4 |
title | Digital integrated circuit design using Verilog and SystemVerilog |
title_auth | Digital integrated circuit design using Verilog and SystemVerilog |
title_exact_search | Digital integrated circuit design using Verilog and SystemVerilog |
title_full | Digital integrated circuit design using Verilog and SystemVerilog Ronald Mehler |
title_fullStr | Digital integrated circuit design using Verilog and SystemVerilog Ronald Mehler |
title_full_unstemmed | Digital integrated circuit design using Verilog and SystemVerilog Ronald Mehler |
title_short | Digital integrated circuit design using Verilog and SystemVerilog |
title_sort | digital integrated circuit design using verilog and systemverilog |
topic | Digital integrated circuits / Design and construction Verilog (Computer hardware description language) SystemVerilog (Computer hardware description language) Integrated circuits Digital integrated circuits / Design and construction fast Integrated circuits fast SystemVerilog (Computer hardware description language) fast Verilog (Computer hardware description language) fast VERILOG (DE-588)4268385-3 gnd Schaltungsentwurf (DE-588)4179389-4 gnd Digitale integrierte Schaltung (DE-588)4113313-4 gnd |
topic_facet | Digital integrated circuits / Design and construction Verilog (Computer hardware description language) SystemVerilog (Computer hardware description language) Integrated circuits VERILOG Schaltungsentwurf Digitale integrierte Schaltung |
work_keys_str_mv | AT mehlerroland digitalintegratedcircuitdesignusingverilogandsystemverilog |