The gm/ID methodology, a sizing tool for low-voltage analog CMOS circuits: the semi-empirical and compact model approaches
Saved in:
| Main Author: | |
|---|---|
| Format: | Electronic eBook |
| Language: | English |
| Published: |
Dordrecht, DE
Springer
c2010
|
| Series: | Analog circuits and signal processing series
|
| Subjects: | |
| Online Access: | Volltext |
| Item Description: | In title "gm/ID" both the m and D are subscript Includes bibliographical references (p. 167-168) and index |
| Physical Description: | 1 Online-Ressource (xvi, 171 p.) |
| ISBN: | 9780387471013 0387471014 9781282838093 |
Staff View
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Record in the Search Index
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| id | DE-604.BV041908240 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-10T01:08:01Z |
| institution | BVB |
| isbn | 9780387471013 0387471014 9781282838093 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-027351910 |
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| physical | 1 Online-Ressource (xvi, 171 p.) |
| psigel | ZDB-26-MYL |
| publishDate | 2010 |
| publishDateSearch | 2010 |
| publishDateSort | 2010 |
| publisher | Springer |
| record_format | marc |
| series2 | Analog circuits and signal processing series |
| spelling | Jespers, Paul G. Verfasser aut The gm/ID methodology, a sizing tool for low-voltage analog CMOS circuits the semi-empirical and compact model approaches by Paul G.A. Jespers Dordrecht, DE Springer c2010 1 Online-Ressource (xvi, 171 p.) txt rdacontent c rdamedia cr rdacarrier Analog circuits and signal processing series In title "gm/ID" both the m and D are subscript Includes bibliographical references (p. 167-168) and index Metal oxide semiconductors, Complementary / Design and construction Low voltage integrated circuits / Design and construction Linear integrated circuits / Design and construction CMOS (DE-588)4010319-5 gnd rswk-swf CMOS (DE-588)4010319-5 s 1\p DE-604 Erscheint auch als Druck-Ausgabe, Hardcover 978-0-387-47100-6 Erscheint auch als Druck-Ausgabe, Hardcover 0-387-47100-6 http://lib.myilibrary.com?id=283809 Aggregator Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Jespers, Paul G. The gm/ID methodology, a sizing tool for low-voltage analog CMOS circuits the semi-empirical and compact model approaches Metal oxide semiconductors, Complementary / Design and construction Low voltage integrated circuits / Design and construction Linear integrated circuits / Design and construction CMOS (DE-588)4010319-5 gnd |
| subject_GND | (DE-588)4010319-5 |
| title | The gm/ID methodology, a sizing tool for low-voltage analog CMOS circuits the semi-empirical and compact model approaches |
| title_auth | The gm/ID methodology, a sizing tool for low-voltage analog CMOS circuits the semi-empirical and compact model approaches |
| title_exact_search | The gm/ID methodology, a sizing tool for low-voltage analog CMOS circuits the semi-empirical and compact model approaches |
| title_full | The gm/ID methodology, a sizing tool for low-voltage analog CMOS circuits the semi-empirical and compact model approaches by Paul G.A. Jespers |
| title_fullStr | The gm/ID methodology, a sizing tool for low-voltage analog CMOS circuits the semi-empirical and compact model approaches by Paul G.A. Jespers |
| title_full_unstemmed | The gm/ID methodology, a sizing tool for low-voltage analog CMOS circuits the semi-empirical and compact model approaches by Paul G.A. Jespers |
| title_short | The gm/ID methodology, a sizing tool for low-voltage analog CMOS circuits |
| title_sort | the gm id methodology a sizing tool for low voltage analog cmos circuits the semi empirical and compact model approaches |
| title_sub | the semi-empirical and compact model approaches |
| topic | Metal oxide semiconductors, Complementary / Design and construction Low voltage integrated circuits / Design and construction Linear integrated circuits / Design and construction CMOS (DE-588)4010319-5 gnd |
| topic_facet | Metal oxide semiconductors, Complementary / Design and construction Low voltage integrated circuits / Design and construction Linear integrated circuits / Design and construction CMOS |
| url | http://lib.myilibrary.com?id=283809 |
| work_keys_str_mv | AT jesperspaulg thegmidmethodologyasizingtoolforlowvoltageanalogcmoscircuitsthesemiempiricalandcompactmodelapproaches |