APA (7th ed.) Citation

Jespers, P. G. (2010). The gm/ID methodology, a sizing tool for low-voltage analog CMOS circuits: The semi-empirical and compact model approaches. Springer.

Chicago Style (17th ed.) Citation

Jespers, Paul G. The Gm/ID Methodology, a Sizing Tool for Low-voltage Analog CMOS Circuits: The Semi-empirical and Compact Model Approaches. Dordrecht, DE: Springer, 2010.

MLA (9th ed.) Citation

Jespers, Paul G. The Gm/ID Methodology, a Sizing Tool for Low-voltage Analog CMOS Circuits: The Semi-empirical and Compact Model Approaches. Springer, 2010.