Dynamic reconfigurable network-on-chip design: innovations for computational processing and communication
Gespeichert in:
| Weitere Verfasser: | , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Hershey, Pa. [u.a.]
Information Science Reference
2010
|
| Schriftenreihe: | Premier reference source
|
| Schlagworte: | |
| Beschreibung: | Includes bibliographical references and index |
| Beschreibung: | XVII, 366 S. Ill., graph. Darst. |
| ISBN: | 9781615208074 |
Internformat
MARC
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| 245 | 1 | 0 | |a Dynamic reconfigurable network-on-chip design |b innovations for computational processing and communication |c Jih-Sheng Shen ; Pao-Ann Hsiung [editors] |
| 246 | 1 | |a Dynamic reconfigurable network on chip design | |
| 264 | 1 | |a Hershey, Pa. [u.a.] |b Information Science Reference |c 2010 | |
| 300 | |a XVII, 366 S. |b Ill., graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
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| 338 | |b nc |2 rdacarrier | ||
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| 500 | |a Includes bibliographical references and index | ||
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| 650 | 0 | 7 | |a Schaltungsentwurf |0 (DE-588)4179389-4 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a System-on-Chip |0 (DE-588)4740357-3 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Chip |0 (DE-588)4197163-2 |2 gnd |9 rswk-swf |
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| 689 | 0 | 2 | |a Schaltungsentwurf |0 (DE-588)4179389-4 |D s |
| 689 | 0 | 3 | |a Chip |0 (DE-588)4197163-2 |D s |
| 689 | 0 | |5 DE-604 | |
| 700 | 1 | |a Shen, Jih-Sheng |0 (DE-588)1026814219 |4 edt | |
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| 883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
Datensatz im Suchindex
| _version_ | 1804152103793328128 |
|---|---|
| any_adam_object | |
| author2 | Shen, Jih-Sheng Hsiung, Pao-Ann |
| author2_role | edt edt |
| author2_variant | j s s jss p a h pah |
| author_GND | (DE-588)1026814219 |
| author_facet | Shen, Jih-Sheng Hsiung, Pao-Ann |
| building | Verbundindex |
| bvnumber | BV041788237 |
| classification_rvk | ST 200 |
| ctrlnum | (OCoLC)915443203 (DE-599)HBZHT017408000 |
| discipline | Informatik |
| format | Book |
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| physical | XVII, 366 S. Ill., graph. Darst. |
| publishDate | 2010 |
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| spelling | Dynamic reconfigurable network-on-chip design innovations for computational processing and communication Jih-Sheng Shen ; Pao-Ann Hsiung [editors] Dynamic reconfigurable network on chip design Hershey, Pa. [u.a.] Information Science Reference 2010 XVII, 366 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Premier reference source Includes bibliographical references and index Elektrisches Netzwerk (DE-588)4014214-0 gnd rswk-swf Schaltungsentwurf (DE-588)4179389-4 gnd rswk-swf System-on-Chip (DE-588)4740357-3 gnd rswk-swf Chip (DE-588)4197163-2 gnd rswk-swf Networks on a chip. 1\p (DE-588)4143413-4 Aufsatzsammlung gnd-content System-on-Chip (DE-588)4740357-3 s Elektrisches Netzwerk (DE-588)4014214-0 s Schaltungsentwurf (DE-588)4179389-4 s Chip (DE-588)4197163-2 s DE-604 Shen, Jih-Sheng (DE-588)1026814219 edt Hsiung, Pao-Ann edt Erscheint auch als Online-Ausgabe 978-1-615-20808-1 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Dynamic reconfigurable network-on-chip design innovations for computational processing and communication Elektrisches Netzwerk (DE-588)4014214-0 gnd Schaltungsentwurf (DE-588)4179389-4 gnd System-on-Chip (DE-588)4740357-3 gnd Chip (DE-588)4197163-2 gnd |
| subject_GND | (DE-588)4014214-0 (DE-588)4179389-4 (DE-588)4740357-3 (DE-588)4197163-2 (DE-588)4143413-4 |
| title | Dynamic reconfigurable network-on-chip design innovations for computational processing and communication |
| title_alt | Dynamic reconfigurable network on chip design |
| title_auth | Dynamic reconfigurable network-on-chip design innovations for computational processing and communication |
| title_exact_search | Dynamic reconfigurable network-on-chip design innovations for computational processing and communication |
| title_full | Dynamic reconfigurable network-on-chip design innovations for computational processing and communication Jih-Sheng Shen ; Pao-Ann Hsiung [editors] |
| title_fullStr | Dynamic reconfigurable network-on-chip design innovations for computational processing and communication Jih-Sheng Shen ; Pao-Ann Hsiung [editors] |
| title_full_unstemmed | Dynamic reconfigurable network-on-chip design innovations for computational processing and communication Jih-Sheng Shen ; Pao-Ann Hsiung [editors] |
| title_short | Dynamic reconfigurable network-on-chip design |
| title_sort | dynamic reconfigurable network on chip design innovations for computational processing and communication |
| title_sub | innovations for computational processing and communication |
| topic | Elektrisches Netzwerk (DE-588)4014214-0 gnd Schaltungsentwurf (DE-588)4179389-4 gnd System-on-Chip (DE-588)4740357-3 gnd Chip (DE-588)4197163-2 gnd |
| topic_facet | Elektrisches Netzwerk Schaltungsentwurf System-on-Chip Chip Aufsatzsammlung |
| work_keys_str_mv | AT shenjihsheng dynamicreconfigurablenetworkonchipdesigninnovationsforcomputationalprocessingandcommunication AT hsiungpaoann dynamicreconfigurablenetworkonchipdesigninnovationsforcomputationalprocessingandcommunication AT shenjihsheng dynamicreconfigurablenetworkonchipdesign AT hsiungpaoann dynamicreconfigurablenetworkonchipdesign |