High-Bandwidth Memory Interface:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
2014
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| Schriftenreihe: | SpringerBriefs in Electrical and Computer Engineering
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| Schlagworte: | |
| Online-Zugang: | BTU01 FHA01 FHI01 FHN01 FHR01 FKE01 FRO01 FWS01 FWS02 UBY01 Volltext Inhaltsverzeichnis Abstract |
| Beschreibung: | This book provides an overview of recent advances in memory interface design at both the architecture and circuit levels. Coverage includes signal integrity and testing, TSV interface, high-speed serial interface including equalization, ODT, pre-emphasis, wide I/O interface including crosstalk, skew cancellation, and clock generation and distribution. Trends for further bandwidth enhancement are also covered. • Enables readers with minimal background in memory design to understand the basics of high-bandwidth memory interface design; • Presents state-of-the-art techniques for memory interface design; • Covers memory interface design at both the circuit level and system architecture level |
| Beschreibung: | 1 Online-Ressource (VIII, 88 p.) 91 illus., 41 illus. in color |
| ISBN: | 9783319023816 |
| DOI: | 10.1007/978-3-319-02381-6 |
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Datensatz im Suchindex
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| adam_text | HIGH-BANDWIDTH MEMORY INTERFACE
/ KIM, CHULWOO
: 2014
TABLE OF CONTENTS / INHALTSVERZEICHNIS
AN INTRODUCTION TO HIGH-SPEED DRAM
AN I/O LINE CONFIGURATION AND ORGANIZATION OF DRAM
CLOCK GENERATION AND DISTRIBUTION
TRANSCEIVER DESIGN
TSV INTERFACE FOR DRAM.
DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT.
HIGH-BANDWIDTH MEMORY INTERFACE
/ KIM, CHULWOO
: 2014
ABSTRACT / INHALTSTEXT
THIS BOOK PROVIDES AN OVERVIEW OF RECENT ADVANCES IN MEMORY INTERFACE
DESIGN AT BOTH THE ARCHITECTURE AND CIRCUIT LEVELS. COVERAGE INCLUDES
SIGNAL INTEGRITY AND TESTING, TSV INTERFACE, HIGH-SPEED SERIAL INTERFACE
INCLUDING EQUALIZATION, ODT, PRE-EMPHASIS, WIDE I/O INTERFACE INCLUDING
CROSSTALK, SKEW CANCELLATION, AND CLOCK GENERATION AND DISTRIBUTION.
TRENDS FOR FURTHER BANDWIDTH ENHANCEMENT ARE ALSO COVERED.
•ENABLES READERS WITH MINIMAL BACKGROUND IN MEMORY DESIGN TO
UNDERSTAND THE BASICS OF HIGH-BANDWIDTH MEMORY INTERFACE DESIGN;
•PRESENTS STATE-OF-THE-ART TECHNIQUES FOR MEMORY INTERFACE DESIGN;
•COVERS MEMORY INTERFACE DESIGN AT BOTH THE CIRCUIT LEVEL AND SYSTEM
ARCHITECTURE LEVEL
DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT.
|
| any_adam_object | 1 |
| author | Kim, Chulwoo |
| author_facet | Kim, Chulwoo |
| author_role | aut |
| author_sort | Kim, Chulwoo |
| author_variant | c k ck |
| building | Verbundindex |
| bvnumber | BV041470991 |
| collection | ZDB-2-ENG |
| contents | An introduction to high-speed DRAM -- An I/O Line Configuration and Organization of DRAM -- Clock generation and distribution -- Transceiver Design -- TSV Interface for DRAM. |
| ctrlnum | (OCoLC)865039838 (DE-599)BVBBV041470991 |
| dewey-full | 621.3815 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3815 |
| dewey-search | 621.3815 |
| dewey-sort | 3621.3815 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| doi_str_mv | 10.1007/978-3-319-02381-6 |
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| id | DE-604.BV041470991 |
| illustrated | Illustrated |
| indexdate | 2025-02-20T06:39:01Z |
| institution | BVB |
| isbn | 9783319023816 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-026917134 |
| oclc_num | 865039838 |
| open_access_boolean | |
| owner | DE-Aug4 DE-92 DE-634 DE-859 DE-898 DE-BY-UBR DE-573 DE-861 DE-706 DE-863 DE-BY-FWS DE-862 DE-BY-FWS |
| owner_facet | DE-Aug4 DE-92 DE-634 DE-859 DE-898 DE-BY-UBR DE-573 DE-861 DE-706 DE-863 DE-BY-FWS DE-862 DE-BY-FWS |
| physical | 1 Online-Ressource (VIII, 88 p.) 91 illus., 41 illus. in color |
| psigel | ZDB-2-ENG |
| publishDate | 2014 |
| publishDateSearch | 2014 |
| publishDateSort | 2014 |
| record_format | marc |
| series2 | SpringerBriefs in Electrical and Computer Engineering |
| spellingShingle | Kim, Chulwoo High-Bandwidth Memory Interface An introduction to high-speed DRAM -- An I/O Line Configuration and Organization of DRAM -- Clock generation and distribution -- Transceiver Design -- TSV Interface for DRAM. Engineering Electronics Systems engineering Circuits and Systems Electronic Circuits and Devices Electronics and Microelectronics, Instrumentation Ingenieurwissenschaften |
| title | High-Bandwidth Memory Interface |
| title_auth | High-Bandwidth Memory Interface |
| title_exact_search | High-Bandwidth Memory Interface |
| title_full | High-Bandwidth Memory Interface by Chulwoo Kim, Hyun-Woo Lee, Junyoung Song |
| title_fullStr | High-Bandwidth Memory Interface by Chulwoo Kim, Hyun-Woo Lee, Junyoung Song |
| title_full_unstemmed | High-Bandwidth Memory Interface by Chulwoo Kim, Hyun-Woo Lee, Junyoung Song |
| title_short | High-Bandwidth Memory Interface |
| title_sort | high bandwidth memory interface |
| topic | Engineering Electronics Systems engineering Circuits and Systems Electronic Circuits and Devices Electronics and Microelectronics, Instrumentation Ingenieurwissenschaften |
| topic_facet | Engineering Electronics Systems engineering Circuits and Systems Electronic Circuits and Devices Electronics and Microelectronics, Instrumentation Ingenieurwissenschaften |
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