Embedded Memory Design for Multi-Core and Systems on Chip:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
2014
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| Schriftenreihe: | Analog Circuits and Signal Processing
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| Schlagworte: | |
| Online-Zugang: | BTU01 FHA01 FHI01 FHN01 FHR01 FKE01 FRO01 FWS01 FWS02 UBY01 Volltext Inhaltsverzeichnis Abstract |
| Beschreibung: | This book describes the various tradeoffs systems designers face when designing embedded memory. Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test. The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory. · Provides a comprehensive overview of embedded memory design and associated challenges and choices; · Explains tradeoffs and dependencies across different disciplines involved with multi-core and system on chip memory design; · Includes detailed discussion of memory hierarchy and its impact on energy and performance; · Uses real product examples to demonstrate embedded memory design flow from architecture, to circuit design, design for test and yield analysis |
| Beschreibung: | 1 Online-Ressource (XIII, 95 p.) 63 illus., 37 illus. in color |
| ISBN: | 9781461488811 |
| DOI: | 10.1007/978-1-4614-8881-1 |
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| 505 | 0 | |a Introduction -- Cache Architecture and Main Blocks -- Embedded Memory Hierarchy -- SRAM Memory Operation and Yield -- Low Power and High Yield SRAM Memory -- Leakage Reduction -- Embedded Memory Verification -- Embedded Memory Design Validation and Design For Test -- Emerging Memory Technology Opportunities and Challenges | |
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Datensatz im Suchindex
| DE-BY-FWS_katkey | 1015556 |
|---|---|
| _version_ | 1806174832479436800 |
| adam_text | EMBEDDED MEMORY DESIGN FOR MULTI-CORE AND SYSTEMS ON CHIP
/ MOHAMMAD, BAKER
: 2014
TABLE OF CONTENTS / INHALTSVERZEICHNIS
INTRODUCTION
CACHE ARCHITECTURE AND MAIN BLOCKS
EMBEDDED MEMORY HIERARCHY
SRAM MEMORY OPERATION AND YIELD
LOW POWER AND HIGH YIELD SRAM MEMORY
LEAKAGE REDUCTION
EMBEDDED MEMORY VERIFICATION
EMBEDDED MEMORY DESIGN VALIDATION AND DESIGN FOR TEST
EMERGING MEMORY TECHNOLOGY OPPORTUNITIES AND CHALLENGES
DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT.
EMBEDDED MEMORY DESIGN FOR MULTI-CORE AND SYSTEMS ON CHIP
/ MOHAMMAD, BAKER
: 2014
ABSTRACT / INHALTSTEXT
THIS BOOK DESCRIBES THE VARIOUS TRADEOFFS SYSTEMS DESIGNERS FACE WHEN
DESIGNING EMBEDDED MEMORY. READERS DESIGNING MULTI-CORE SYSTEMS AND
SYSTEMS ON CHIP WILL BENEFIT FROM THE DISCUSSION OF DIFFERENT TOPICS
FROM MEMORY ARCHITECTURE, ARRAY ORGANIZATION, CIRCUIT DESIGN TECHNIQUES
AND DESIGN FOR TEST. THE PRESENTATION ENABLES A MULTI-DISCIPLINARY
APPROACH TO CHIP DESIGN, WHICH BRIDGES THE GAP BETWEEN THE ARCHITECTURE
LEVEL AND CIRCUIT LEVEL, IN ORDER TO ADDRESS YIELD, RELIABILITY AND
POWER-RELATED ISSUES FOR EMBEDDED MEMORY. PROVIDES
A COMPREHENSIVE OVERVIEW OF EMBEDDED MEMORY DESIGN AND ASSOCIATED
CHALLENGES AND CHOICES; EXPLAINS TRADEOFFS AND
DEPENDENCIES ACROSS DIFFERENT DISCIPLINES INVOLVED WITH MULTI-CORE AND
SYSTEM ON CHIP MEMORY DESIGN; INCLUDES DETAILED
DISCUSSION OF MEMORY HIERARCHY AND ITS IMPACT ON ENERGY AND PERFORMANCE;
USES REAL PRODUCT EXAMPLES TO DEMONSTRATE EMBEDDED
MEMORY DESIGN FLOW FROM ARCHITECTURE, TO CIRCUIT DESIGN, DESIGN FOR TEST
AND YIELD ANALYSIS
DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT.
|
| any_adam_object | 1 |
| author | Mohammad, Baker |
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| contents | Introduction -- Cache Architecture and Main Blocks -- Embedded Memory Hierarchy -- SRAM Memory Operation and Yield -- Low Power and High Yield SRAM Memory -- Leakage Reduction -- Embedded Memory Verification -- Embedded Memory Design Validation and Design For Test -- Emerging Memory Technology Opportunities and Challenges |
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| dewey-search | 621.3815 |
| dewey-sort | 3621.3815 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
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| id | DE-604.BV041470901 |
| illustrated | Illustrated |
| indexdate | 2024-08-01T10:55:48Z |
| institution | BVB |
| isbn | 9781461488811 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-026917044 |
| oclc_num | 865039490 |
| open_access_boolean | |
| owner | DE-Aug4 DE-92 DE-634 DE-859 DE-898 DE-BY-UBR DE-573 DE-861 DE-706 DE-863 DE-BY-FWS DE-862 DE-BY-FWS |
| owner_facet | DE-Aug4 DE-92 DE-634 DE-859 DE-898 DE-BY-UBR DE-573 DE-861 DE-706 DE-863 DE-BY-FWS DE-862 DE-BY-FWS |
| physical | 1 Online-Ressource (XIII, 95 p.) 63 illus., 37 illus. in color |
| psigel | ZDB-2-ENG |
| publishDate | 2014 |
| publishDateSearch | 2014 |
| publishDateSort | 2014 |
| record_format | marc |
| series2 | Analog Circuits and Signal Processing |
| spellingShingle | Mohammad, Baker Embedded Memory Design for Multi-Core and Systems on Chip Introduction -- Cache Architecture and Main Blocks -- Embedded Memory Hierarchy -- SRAM Memory Operation and Yield -- Low Power and High Yield SRAM Memory -- Leakage Reduction -- Embedded Memory Verification -- Embedded Memory Design Validation and Design For Test -- Emerging Memory Technology Opportunities and Challenges Engineering Computer science Electronics Systems engineering Circuits and Systems Electronics and Microelectronics, Instrumentation Processor Architectures Informatik Ingenieurwissenschaften |
| title | Embedded Memory Design for Multi-Core and Systems on Chip |
| title_auth | Embedded Memory Design for Multi-Core and Systems on Chip |
| title_exact_search | Embedded Memory Design for Multi-Core and Systems on Chip |
| title_full | Embedded Memory Design for Multi-Core and Systems on Chip by Baker Mohammad |
| title_fullStr | Embedded Memory Design for Multi-Core and Systems on Chip by Baker Mohammad |
| title_full_unstemmed | Embedded Memory Design for Multi-Core and Systems on Chip by Baker Mohammad |
| title_short | Embedded Memory Design for Multi-Core and Systems on Chip |
| title_sort | embedded memory design for multi core and systems on chip |
| topic | Engineering Computer science Electronics Systems engineering Circuits and Systems Electronics and Microelectronics, Instrumentation Processor Architectures Informatik Ingenieurwissenschaften |
| topic_facet | Engineering Computer science Electronics Systems engineering Circuits and Systems Electronics and Microelectronics, Instrumentation Processor Architectures Informatik Ingenieurwissenschaften |
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