Design for Manufacturability: From 1D to 4D for 90–22 nm Technology Nodes
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
2014
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| Schlagworte: | |
| Online-Zugang: | BTU01 FHA01 FHI01 FHN01 FHR01 FKE01 FRO01 FWS01 FWS02 UBY01 Volltext |
| Beschreibung: | This book explains integrated circuit design for manufacturability (DfM) at the product level (packaging, applications) and applies engineering DfM principles to the latest standards of product development at 22 nm technology nodes. It is a valuable guide for layout designers, packaging engineers and quality engineers, covering DfM development from 1D to 4D, involving IC design flow setup, best practices, links to manufacturing and product definition, for process technologies down to 22 nm node, and product families including memories, logic, system-on-chip and system-in-package. · Provides design for manufacturability guidelines on layout techniques for the most advanced, 22 nm technology nodes; · Includes information valuable to layout designers, packaging engineers and quality engineers, working on memories, logic, system-on-chip and system-in-package; · Offers a highly-accessible, single-source reference to information otherwise available only from disparate sources; · Helps readers to translate reliability methodology into real design flows |
| Beschreibung: | 1 Online-Ressource (VIII, 278 p.) 214 illus., 45 illus. in color |
| ISBN: | 9781461417613 |
| DOI: | 10.1007/978-1-4614-1761-3 |
Internformat
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| 500 | |a This book explains integrated circuit design for manufacturability (DfM) at the product level (packaging, applications) and applies engineering DfM principles to the latest standards of product development at 22 nm technology nodes. It is a valuable guide for layout designers, packaging engineers and quality engineers, covering DfM development from 1D to 4D, involving IC design flow setup, best practices, links to manufacturing and product definition, for process technologies down to 22 nm node, and product families including memories, logic, system-on-chip and system-in-package. · Provides design for manufacturability guidelines on layout techniques for the most advanced, 22 nm technology nodes; · Includes information valuable to layout designers, packaging engineers and quality engineers, working on memories, logic, system-on-chip and system-in-package; · Offers a highly-accessible, single-source reference to information otherwise available only from disparate sources; · Helps readers to translate reliability methodology into real design flows | ||
| 505 | 0 | |a Preface -- Classic DfM: from 2D to 3D -- DfM at 28 nm and Beyond -- New DfM Domain: Stress Effects -- Conclusions and Future Work | |
| 650 | 4 | |a Engineering | |
| 650 | 4 | |a System safety | |
| 650 | 4 | |a Electronics | |
| 650 | 4 | |a Systems engineering | |
| 650 | 4 | |a Circuits and Systems | |
| 650 | 4 | |a Electronics and Microelectronics, Instrumentation | |
| 650 | 4 | |a Quality Control, Reliability, Safety and Risk | |
| 650 | 4 | |a Ingenieurwissenschaften | |
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Datensatz im Suchindex
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| _version_ | 1806174832296984576 |
| any_adam_object | |
| author | Balasinski, Artur |
| author_facet | Balasinski, Artur |
| author_role | aut |
| author_sort | Balasinski, Artur |
| author_variant | a b ab |
| building | Verbundindex |
| bvnumber | BV041470845 |
| collection | ZDB-2-ENG |
| contents | Preface -- Classic DfM: from 2D to 3D -- DfM at 28 nm and Beyond -- New DfM Domain: Stress Effects -- Conclusions and Future Work |
| ctrlnum | (OCoLC)865038810 (DE-599)BVBBV041470845 |
| dewey-full | 621.3815 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3815 |
| dewey-search | 621.3815 |
| dewey-sort | 3621.3815 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| doi_str_mv | 10.1007/978-1-4614-1761-3 |
| format | Electronic eBook |
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| id | DE-604.BV041470845 |
| illustrated | Illustrated |
| indexdate | 2024-08-01T10:55:48Z |
| institution | BVB |
| isbn | 9781461417613 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-026916988 |
| oclc_num | 865038810 |
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| owner_facet | DE-Aug4 DE-92 DE-634 DE-859 DE-898 DE-BY-UBR DE-573 DE-861 DE-706 DE-863 DE-BY-FWS DE-862 DE-BY-FWS |
| physical | 1 Online-Ressource (VIII, 278 p.) 214 illus., 45 illus. in color |
| psigel | ZDB-2-ENG |
| publishDate | 2014 |
| publishDateSearch | 2014 |
| publishDateSort | 2014 |
| record_format | marc |
| spellingShingle | Balasinski, Artur Design for Manufacturability From 1D to 4D for 90–22 nm Technology Nodes Preface -- Classic DfM: from 2D to 3D -- DfM at 28 nm and Beyond -- New DfM Domain: Stress Effects -- Conclusions and Future Work Engineering System safety Electronics Systems engineering Circuits and Systems Electronics and Microelectronics, Instrumentation Quality Control, Reliability, Safety and Risk Ingenieurwissenschaften |
| title | Design for Manufacturability From 1D to 4D for 90–22 nm Technology Nodes |
| title_auth | Design for Manufacturability From 1D to 4D for 90–22 nm Technology Nodes |
| title_exact_search | Design for Manufacturability From 1D to 4D for 90–22 nm Technology Nodes |
| title_full | Design for Manufacturability From 1D to 4D for 90–22 nm Technology Nodes by Artur Balasinski |
| title_fullStr | Design for Manufacturability From 1D to 4D for 90–22 nm Technology Nodes by Artur Balasinski |
| title_full_unstemmed | Design for Manufacturability From 1D to 4D for 90–22 nm Technology Nodes by Artur Balasinski |
| title_short | Design for Manufacturability |
| title_sort | design for manufacturability from 1d to 4d for 90 22 nm technology nodes |
| title_sub | From 1D to 4D for 90–22 nm Technology Nodes |
| topic | Engineering System safety Electronics Systems engineering Circuits and Systems Electronics and Microelectronics, Instrumentation Quality Control, Reliability, Safety and Risk Ingenieurwissenschaften |
| topic_facet | Engineering System safety Electronics Systems engineering Circuits and Systems Electronics and Microelectronics, Instrumentation Quality Control, Reliability, Safety and Risk Ingenieurwissenschaften |
| url | https://doi.org/10.1007/978-1-4614-1761-3 |
| work_keys_str_mv | AT balasinskiartur designformanufacturabilityfrom1dto4dfor9022nmtechnologynodes |