Automated design of analog and high-frequency circuits: a computational intelligence approach
Gespeichert in:
| Hauptverfasser: | , , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Berlin [u.a.]
Springer
2014
|
| Schriftenreihe: | Studies in Computational Intelligence
501 |
| Schlagworte: | |
| Online-Zugang: | Inhaltstext Inhaltsverzeichnis |
| Beschreibung: | XIII, 235 S. graph. Darst. 235 mm x 155 mm |
| ISBN: | 9783642391613 3642391613 |
| ISSN: | 1860-949x |
Internformat
MARC
| LEADER | 00000nam a2200000 cb4500 | ||
|---|---|---|---|
| 001 | BV041349722 | ||
| 003 | DE-604 | ||
| 005 | 20180327 | ||
| 007 | t | ||
| 008 | 131009s2014 gw d||| |||| 00||| eng d | ||
| 015 | |a 13,N23 |2 dnb | ||
| 016 | 7 | |a 103534128X |2 DE-101 | |
| 020 | |a 9783642391613 |c Gb. : ca. EUR 106.95 (DE) (freier Pr.), ca. EUR 109.95 (AT) (freier Pr.), ca. sfr 133.50 (freier Pr.) |9 978-3-642-39161-3 | ||
| 020 | |a 3642391613 |9 3-642-39161-3 | ||
| 035 | |a (OCoLC)864484861 | ||
| 035 | |a (DE-599)DNB103534128X | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a eng | |
| 044 | |a gw |c XA-DE-BE | ||
| 049 | |a DE-11 |a DE-862 | ||
| 082 | 0 | |a 621.3815028563 |2 22/ger | |
| 084 | |a ST 300 |0 (DE-625)143650: |2 rvk | ||
| 084 | |a 620 |2 sdnb | ||
| 100 | 1 | |a Liu, Bo |e Verfasser |0 (DE-588)1155206924 |4 aut | |
| 245 | 1 | 0 | |a Automated design of analog and high-frequency circuits |b a computational intelligence approach |c Bo Liu ; Georges Gielen ; Francisco V. Fernández |
| 264 | 1 | |a Berlin [u.a.] |b Springer |c 2014 | |
| 300 | |a XIII, 235 S. |b graph. Darst. |c 235 mm x 155 mm | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 1 | |a Studies in Computational Intelligence |v 501 |x 1860-949x | |
| 650 | 0 | 7 | |a Soft Computing |0 (DE-588)4455833-8 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Hochfrequenzschaltung |0 (DE-588)4160147-6 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Analoge integrierte Schaltung |0 (DE-588)4112519-8 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Entwurfsautomation |0 (DE-588)4312536-0 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a Entwurfsautomation |0 (DE-588)4312536-0 |D s |
| 689 | 0 | 1 | |a Analoge integrierte Schaltung |0 (DE-588)4112519-8 |D s |
| 689 | 0 | 2 | |a Hochfrequenzschaltung |0 (DE-588)4160147-6 |D s |
| 689 | 0 | 3 | |a Soft Computing |0 (DE-588)4455833-8 |D s |
| 689 | 0 | |5 DE-604 | |
| 700 | 1 | |a Gielen, Georges |e Verfasser |4 aut | |
| 700 | 1 | |a Valverde Fernandez, Francisco |e Verfasser |4 aut | |
| 776 | 0 | 8 | |i Erscheint auch als |n Online-Ausgabe |z 978-3-642-39162-0 |
| 830 | 0 | |a Studies in Computational Intelligence |v 501 |w (DE-604)BV020822171 |9 501 | |
| 856 | 4 | 2 | |m X:MVB |q text/html |u http://deposit.dnb.de/cgi-bin/dokserv?id=4352585&prov=M&dok_var=1&dok_ext=htm |3 Inhaltstext |
| 856 | 4 | 2 | |m DNB Datenaustausch |q application/pdf |u http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=026798323&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |3 Inhaltsverzeichnis |
| 943 | 1 | |a oai:aleph.bib-bvb.de:BVB01-026798323 | |
Datensatz im Suchindex
| DE-BY-862_location | 2000 |
|---|---|
| DE-BY-FWS_call_number | 2000/ST 300 L783 |
| DE-BY-FWS_katkey | 684684 |
| DE-BY-FWS_media_number | 083000520204 |
| _version_ | 1809774449260494848 |
| adam_text |
CONTENTS
1 BASIC CONCEPTS AND BACKGROUND 1
1.1 INTRODUCTION 1
1.2 AN INTRODUCTION INTO COMPUTATIONAL INTELLIGENCE 5
1.2.1 EVOLUTIONARY COMPUTATION 5
1.2.2 FUZZY LOGIC 7
1.2.3 MACHINE LEARNING 9
1.3 FUNDAMENTAL CONCEPTS IN OPTIMIZATION 9
1.4 DESIGN AND COMPUTER-AIDED DESIGN OF ANALOG/RF IC 11
1.4.1 OVERVIEW OF ANALOG/RF CIRCUIT
AND SYSTEM DESIGN 11
1.4.2 OVERVIEW OF THE COMPUTER-AIDED DESIGN
OF ANALOG/RF ICS 13
1.5 SUMMARY 15
REFERENCES 16
2 FUNDAMENTALS OF OPTIMIZATION TECHNIQUES
IN ANALOG IC SIZING 19
2.1 ANALOG IC SIZING: INTRODUCTION AND PROBLEM DEFINITION 19
2.2 REVIEW OF ANALOG IC SIZING APPROACHES 21
2.3 IMPLEMENTATION OF EVOLUTIONARY ALGORITHMS 23
2.3.1 OVERVIEW OF THE IMPLEMENTATION OF AN EA 23
2.3.2 DIFFERENTIAL EVOLUTION 24
2.4 BASICS OF CONSTRAINT HANDLING TECHNIQUES 27
2.4.1 STATIC PENALTY FUNCTIONS 27
2.4.2 SELECTION-BASED CONSTRAINT HANDLING METHOD 28
2.5 MULTI-OBJECTIVE ANALOG CIRCUIT SIZING 29
2.5.1 NSGA-II 29
2.5.2 MOEA/D 32
2.6 ANALOG CIRCUIT SIZING EXAMPLES 34
2.6.1 FOLDED-CASCODE AMPLIFIER 34
2.6.2 SINGLE-OBJECTIVE CONSTRAINED OPTIMIZATION 34
2.6.3 MULTI-OBJECTIVE OPTIMIZATION 36
2.7 SUMMARY 38
REFERENCES 39
HTTP://D-NB.INFO/103534128X
X CONTENTS
3 HIGH-PERFORMANCE ANALOG IC SIZING: ADVANCED CONSTRAINT
HANDLING AND SEARCH METHODS 41
3.1 CHALLENGES IN ANALOG CIRCUIT SIZING 41
3.2 ADVANCED CONSTRAINED OPTIMIZATION TECHNIQUES 42
3.2.1 OVERVIEW OF THE ADVANCED CONSTRAINT
HANDLING TECHNIQUES 42
3.2.2 A SELF-ADAPTIVE PENALTY FUNCTION-BASED METHOD. 44
3.3 HYBRID METHODS 47
3.3.1 OVERVIEW OF HYBRID METHODS 47
3.3.2 POPULAR HYBRIDIZATION AND MEMETIC ALGORITHM
FOR NUMERICAL OPTIMIZATION 48
3.4 MSOEA: A HYBRID METHOD FOR ANALOG IC SIZING 50
3.4.1 EVOLUTIONARY OPERATORS 50
3.4.2 CONSTRAINT HANDLING METHOD 53
3.4.3 SCALING UP OF MSOEA 53
3.4.4 EXPERIMENTAL RESULTS OF MSOEA 56
3.5 SUMMARY 61
REFERENCES 61
4 ANALOG CIRCUIT SIZING WITH FUZZY SPECIFICATIONS:
ADDRESSING SOFT CONSTRAINTS 63
4.1 INTRODUCTION 63
4.2 THE MOTIVATION OF ANALOG CIRCUIT SIZING
WITH IMPRECISE SPECIFICATIONS 64
4.2.1 WHY IMPRECISE SPECIFICATIONS ARE NECESSARY 64
4.2.2 REVIEW OF EARLY WORKS 65
4.3 DESIGN OF FUZZY NUMBERS 66
4.4 FUZZY SELECTION-BASED CONSTRAINT HANDLING
METHODS (SINGLE-OBJECTIVE) 68
4.5 SINGLE-OBJECTIVE FUZZY ANALOG IC SIZING 70
4.5.1 FUZZY SELECTION-BASED DIFFERENTIAL
EVOLUTION ALGORITHM 70
4.5.2 EXPERIMENTAL RESULTS AND COMPARISONS 71
4.6 MULTI-OBJECTIVE FUZZY ANALOG SIZING 75
4.6.1 MULTI-OBJECTIVE FUZZY SELECTION RULES 76
4.6.2 EXPERIMENTAL RESULTS FOR MULTI-OBJECTIVE
FUZZY ANALOG CIRCUIT SIZING 78
4.7 SUMMARY 81
REFERENCES 82
5 PROCESS VARIATION-A WARE ANALOG CIRCUIT SIZING:
UNCERTAIN OPTIMIZATION 85
5.1 INTRODUCTION TO ANALOG CIRCUIT SIZING CONSIDERING
PROCESS VARIATIONS 85
CONTENTS XI
5.1.1 WHY PROCESS VARIATIONS NEED TO BE TAKEN
INTO ACCOUNT IN ANALOG CIRCUIT SIZING 85
5.1.2 YIELD OPTIMIZATION, YIELD ESTIMATION
AND VARIATION-AWARE SIZING 86
5.1.3 TRADITIONAL METHODS FOR YIELD OPTIMIZATION 88
5.2 UNCERTAIN OPTIMIZATION METHODOLOGIES 90
5.3 THE PRUNING METHOD 92
5.4 ADVANCED MC SAMPLING METHODS 93
5.4.1 AYLESS: A FAST YIELD ESTIMATION METHOD
FOR ANALOG IC 95
5.4.2 EXPERIMENTAL RESULTS OF AYLESS 99
5.5 SUMMARY 103
REFERENCES 103
6 ORDINAL OPTIMIZATION-BASED METHODS FOR EFFICIENT
VARIATION-AWARE ANALOG IC SIZING 107
6.1 ORDINAL OPTIMIZATION : . . . . 108
6.2 EFFICIENT EVOLUTIONARY SEARCH TECHNIQUES 110
6.2.1 USING MEMETIC ALGORITHMS 110
6.2.2 USING MODIFIED EVOLUTIONARY SEARCH OPERATORS ILL
6.3 INTEGRATING OO AND EFFICIENT EVOLUTIONARY SEARCH 113
6.4 EXPERIMENTAL METHODS AND VERIFICATIONS OF ORDE 116
6.4.1 EXPERIMENTAL METHODS FOR UNCERTAIN OPTIMIZATION
WITH MC SIMULATIONS 116
6.4.2 EXPERIMENTAL VERIFICATIONS OF ORDE 117
6.5 FROM YIELD OPTIMIZATION TO SINGLE-OBJECTIVE ANALOG
CIRCUIT VARIATION-AWARE SIZING 119
6.5.1 ORDE-BASED SINGLE-OBJECTIVE VARIATION-AWARE
ANALOG CIRCUIT SIZING 120
6.5.2 EXAMPLE 121
6.6 BI-OBJECTIVE VARIATION-AWARE ANALOG CIRCUIT SIZING 122
6.6.1 THE MOOLP ALGORITHM 123
6.6.2 EXPERIMENTAL RESULTS 128
6.7 SUMMARY 130
REFERENCES 130
7 ELECTROMAGNETIC DESIGN AUTOMATION: SURROGATE MODEL
ASSISTED EVOLUTIONARY ALGORITHM 133
7.1 INTRODUCTION TO SIMULATION-BASED ELECTROMAGNETIC
DESIGN AUTOMATION 134
7.2 REVIEW OF THE TRADITIONAL METHODS 135
7.2.1 INTEGRATED PASSIVE COMPONENT SYNTHESIS 135
7.2.2 RF INTEGRATED CIRCUIT SYNTHESIS 137
7.2.3 ANTENNA SYNTHESIS 138
XII CONTENTS
7.3 CHALLENGES OF ELECTROMAGNETIC DESIGN AUTOMATION 139
7.4 SURROGATE MODEL ASSISTED EVOLUTIONARY ALGORITHMS 140
7.5 GAUSSIAN PROCESS MACHINE LEARNING 142
7.5.1 GAUSSIAN PROCESS MODELING 143
7.5.2 DISCUSSIONS OF GP MODELING 144
7.6 ARTIFICIAL NEURAL NETWORKS 147
7.7 SUMMARY 148
REFERENCES 149
8 PASSIVE COMPONENTS SYNTHESIS AT HIGH FREQUENCIES:
HANDLING PREDICTION UNCERTAINTY 153
8.1 INDIVIDUAL THRESHOLD CONTROL METHOD 154
8.1.1 MOTIVATIONS AND ALGORITHM STRUCTURE 154
8.1.2 DETERMINATION OF THE MSE THRESHOLDS 155
8.2 THE GPDECO ALGORITHM 158
8.2.1 SCALING UP OF GPDECO 158
8.2.2 EXPERIMENTAL VERIFICATION OF GPDECO 160
8.3 PRESCREENING METHODS 161
8.3.1 THE MOTIVATION OF PRESCREENING 161
8.3.2 WIDELY USED PRESCREENING METHODS 163
8.4 MMLDE: A HYBRID PRESCREENING AND PREDICTION METHOD . 165
8.4.1 GENERAL OVERVIEW 165
8.4.2 INTEGRATING SURROGATE MODELS INTO EA 166
8.4.3 THE GENERAL FRAMEWORK OF MMLDE 168
8.4.4 EXPERIMENTAL RESULTS OF MMLDE 169
8.5 SAEA FOR MULTI-OBJECTIVE EXPENSIVE OPTIMIZATION
AND GENERATION CONTROL METHOD 173
8.5.1 OVERVIEW OF MULTI-OBJECTIVE EXPENSIVE
OPTIMIZATION METHODS 174
8.5.2 THE GENERATION CONTROL METHOD 175
8.6 HANDLING MULTIPLE OBJECTIVES IN SAEA 176
8.6.1 THE GPMOOG METHOD 177
8.6.2 EXPERIMENTAL RESULT 180
8.7 SUMMARY 182
REFERENCES 182
9 MM-WAVE LINEAR AMPLIFIER DESIGN AUTOMATION:
A FIRST STEP TO COMPLEX PROBLEMS 185
9.1 PROBLEM ANALYSIS AND KEY IDEAS 186
9.1.1 OVERVIEW OF EMLDE 186
9.1.2 THE ACTIVE COMPONENTS LIBRARY AND THE LOOK-UP
TABLE FOR TRANSMISSION LINES . 187
9.1.3 HANDLING CASCADED AMPLIFIERS 188
9.1.4 THE TWO OPTIMIZATION LOOPS 188
CONTENTS XIII
9.2 NAIVE BAYES CLASSIFICATION 190
9.3 KEY ALGORITHMS IN EMLDE 191
9.3.1 THE ABGPDE ALGORITHM 191
9.3.2 THE EMBEDDED SBDE ALGORITHM 193
9.4 SCALING UP OF THE EMLDE ALGORITHM 193
9.5 EXPERIMENTAL RESULTS 195
9.5.1 EXAMPLE CIRCUIT 195
9.5.2 THREE-STAGE LINEAR AMPLIFIER SYNTHESIS 197
9.6 SUMMARY 199
REFERENCES 199
10 MM-WAVE NONLINEAR IC AND COMPLEX ANTENNA SYNTHESIS:
HANDLING HIGH DIMENSIONALITY 201
10.1 MAIN CHALLENGES FOR THE TARGETED PROBLEM
AND DISCUSSIONS 202
10.2 DIMENSION REDUCTION 204
10.2.1 KEY IDEAS 204
10.2.2 GP MODELING WITH DIMENSION REDUCTION
VERSUS DIRECT GP MODELING 206
10.3 THE SURROGATE MODEL-AWARE SEARCH MECHANISM 206
10.4 EXPERIMENTAL TESTS ON MATHEMATICAL BENCHMARK PROBLEMS. 210
10.4.1 TEST PROBLEMS 210
10.4.2 PERFORMANCE AND ANALYSIS 210
10.5 60 GHZ POWER AMPLIFIER SYNTHESIS BY GPEME 219
10.6 COMPLEX ANTENNA SYNTHESIS WITH GPEME 223
10.6.1 EXAMPLE 1: MICROSTRIP-FED CROOKED
CROSS SLOT ANTENNA 225
10.6.2 EXAMPLE 2: INTER-CHIP WIRELESS ANTENNA 228
10.6.3 EXAMPLE 3: FOUR-ELEMENT LINEAR ARRAY ANTENNA . 230
10.7 SUMMARY 232
REFERENCES 234 |
| any_adam_object | 1 |
| author | Liu, Bo Gielen, Georges Valverde Fernandez, Francisco |
| author_GND | (DE-588)1155206924 |
| author_facet | Liu, Bo Gielen, Georges Valverde Fernandez, Francisco |
| author_role | aut aut aut |
| author_sort | Liu, Bo |
| author_variant | b l bl g g gg f f v ff ffv |
| building | Verbundindex |
| bvnumber | BV041349722 |
| classification_rvk | ST 300 |
| ctrlnum | (OCoLC)864484861 (DE-599)DNB103534128X |
| dewey-full | 621.3815028563 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3815028563 |
| dewey-search | 621.3815028563 |
| dewey-sort | 3621.3815028563 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Maschinenbau / Maschinenwesen Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>00000nam a2200000 cb4500</leader><controlfield tag="001">BV041349722</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20180327</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">131009s2014 gw d||| |||| 00||| eng d</controlfield><datafield tag="015" ind1=" " ind2=" "><subfield code="a">13,N23</subfield><subfield code="2">dnb</subfield></datafield><datafield tag="016" ind1="7" ind2=" "><subfield code="a">103534128X</subfield><subfield code="2">DE-101</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9783642391613</subfield><subfield code="c">Gb. : ca. EUR 106.95 (DE) (freier Pr.), ca. EUR 109.95 (AT) (freier Pr.), ca. sfr 133.50 (freier Pr.)</subfield><subfield code="9">978-3-642-39161-3</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">3642391613</subfield><subfield code="9">3-642-39161-3</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)864484861</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)DNB103534128X</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="044" ind1=" " ind2=" "><subfield code="a">gw</subfield><subfield code="c">XA-DE-BE</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-11</subfield><subfield code="a">DE-862</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.3815028563</subfield><subfield code="2">22/ger</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ST 300</subfield><subfield code="0">(DE-625)143650:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">620</subfield><subfield code="2">sdnb</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Liu, Bo</subfield><subfield code="e">Verfasser</subfield><subfield code="0">(DE-588)1155206924</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Automated design of analog and high-frequency circuits</subfield><subfield code="b">a computational intelligence approach</subfield><subfield code="c">Bo Liu ; Georges Gielen ; Francisco V. Fernández</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Berlin [u.a.]</subfield><subfield code="b">Springer</subfield><subfield code="c">2014</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XIII, 235 S.</subfield><subfield code="b">graph. Darst.</subfield><subfield code="c">235 mm x 155 mm</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="1" ind2=" "><subfield code="a">Studies in Computational Intelligence</subfield><subfield code="v">501</subfield><subfield code="x">1860-949x</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Soft Computing</subfield><subfield code="0">(DE-588)4455833-8</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Hochfrequenzschaltung</subfield><subfield code="0">(DE-588)4160147-6</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Analoge integrierte Schaltung</subfield><subfield code="0">(DE-588)4112519-8</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Entwurfsautomation</subfield><subfield code="0">(DE-588)4312536-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Entwurfsautomation</subfield><subfield code="0">(DE-588)4312536-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Analoge integrierte Schaltung</subfield><subfield code="0">(DE-588)4112519-8</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="2"><subfield code="a">Hochfrequenzschaltung</subfield><subfield code="0">(DE-588)4160147-6</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="3"><subfield code="a">Soft Computing</subfield><subfield code="0">(DE-588)4455833-8</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Gielen, Georges</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Valverde Fernandez, Francisco</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Online-Ausgabe</subfield><subfield code="z">978-3-642-39162-0</subfield></datafield><datafield tag="830" ind1=" " ind2="0"><subfield code="a">Studies in Computational Intelligence</subfield><subfield code="v">501</subfield><subfield code="w">(DE-604)BV020822171</subfield><subfield code="9">501</subfield></datafield><datafield tag="856" ind1="4" ind2="2"><subfield code="m">X:MVB</subfield><subfield code="q">text/html</subfield><subfield code="u">http://deposit.dnb.de/cgi-bin/dokserv?id=4352585&prov=M&dok_var=1&dok_ext=htm</subfield><subfield code="3">Inhaltstext</subfield></datafield><datafield tag="856" ind1="4" ind2="2"><subfield code="m">DNB Datenaustausch</subfield><subfield code="q">application/pdf</subfield><subfield code="u">http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=026798323&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA</subfield><subfield code="3">Inhaltsverzeichnis</subfield></datafield><datafield tag="943" ind1="1" ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-026798323</subfield></datafield></record></collection> |
| id | DE-604.BV041349722 |
| illustrated | Illustrated |
| indexdate | 2024-09-10T04:30:10Z |
| institution | BVB |
| isbn | 9783642391613 3642391613 |
| issn | 1860-949x |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-026798323 |
| oclc_num | 864484861 |
| open_access_boolean | |
| owner | DE-11 DE-862 DE-BY-FWS |
| owner_facet | DE-11 DE-862 DE-BY-FWS |
| physical | XIII, 235 S. graph. Darst. 235 mm x 155 mm |
| publishDate | 2014 |
| publishDateSearch | 2014 |
| publishDateSort | 2014 |
| publisher | Springer |
| record_format | marc |
| series | Studies in Computational Intelligence |
| series2 | Studies in Computational Intelligence |
| spellingShingle | Liu, Bo Gielen, Georges Valverde Fernandez, Francisco Automated design of analog and high-frequency circuits a computational intelligence approach Studies in Computational Intelligence Soft Computing (DE-588)4455833-8 gnd Hochfrequenzschaltung (DE-588)4160147-6 gnd Analoge integrierte Schaltung (DE-588)4112519-8 gnd Entwurfsautomation (DE-588)4312536-0 gnd |
| subject_GND | (DE-588)4455833-8 (DE-588)4160147-6 (DE-588)4112519-8 (DE-588)4312536-0 |
| title | Automated design of analog and high-frequency circuits a computational intelligence approach |
| title_auth | Automated design of analog and high-frequency circuits a computational intelligence approach |
| title_exact_search | Automated design of analog and high-frequency circuits a computational intelligence approach |
| title_full | Automated design of analog and high-frequency circuits a computational intelligence approach Bo Liu ; Georges Gielen ; Francisco V. Fernández |
| title_fullStr | Automated design of analog and high-frequency circuits a computational intelligence approach Bo Liu ; Georges Gielen ; Francisco V. Fernández |
| title_full_unstemmed | Automated design of analog and high-frequency circuits a computational intelligence approach Bo Liu ; Georges Gielen ; Francisco V. Fernández |
| title_short | Automated design of analog and high-frequency circuits |
| title_sort | automated design of analog and high frequency circuits a computational intelligence approach |
| title_sub | a computational intelligence approach |
| topic | Soft Computing (DE-588)4455833-8 gnd Hochfrequenzschaltung (DE-588)4160147-6 gnd Analoge integrierte Schaltung (DE-588)4112519-8 gnd Entwurfsautomation (DE-588)4312536-0 gnd |
| topic_facet | Soft Computing Hochfrequenzschaltung Analoge integrierte Schaltung Entwurfsautomation |
| url | http://deposit.dnb.de/cgi-bin/dokserv?id=4352585&prov=M&dok_var=1&dok_ext=htm http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=026798323&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
| volume_link | (DE-604)BV020822171 |
| work_keys_str_mv | AT liubo automateddesignofanalogandhighfrequencycircuitsacomputationalintelligenceapproach AT gielengeorges automateddesignofanalogandhighfrequencycircuitsacomputationalintelligenceapproach AT valverdefernandezfrancisco automateddesignofanalogandhighfrequencycircuitsacomputationalintelligenceapproach |
Beschreibung
THWS Schweinfurt Zentralbibliothek Lesesaal
| Signatur: |
2000 ST 300 L783 |
|---|---|
| Exemplar 1 | ausleihbar Verfügbar Bestellen |