Holdings: Electromigration modeling at circuit layout level

Electromigration modeling at circuit layout level:

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Bibliographic Details
Main Author:	Tan, Cher Ming (Author)
Format:	Electronic eBook
Language:	English
Published:	Singapore[u.a.] Springer 2013
Series:	SpringerBriefs in applied sciences and technology
Subjects:	Ingenieurwissenschaften System safety Engineering
Online Access:	BTU01 FHA01 FHI01 FHN01 FHR01 FKE01 FWS01 UBY01 Volltext Inhaltsverzeichnis Abstract
Physical Description:	1 Online-Ressource
ISBN:	9789814451215
DOI:	10.1007/978-981-4451-21-5

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adam_text	ELECTROMIGRATION MODELING AT CIRCUIT LAYOUT LEVEL / TAN, CHER MING : 2013 TABLE OF CONTENTS / INHALTSVERZEICHNIS INTRODUCTION 3D CIRCUIT MODEL CONSTRUCTION AND SIMULATION COMPARISON OF EM PERFORMANCE IN CIRCUIT STRUCTURE AND TEST STRUCTURE INTERCONNECT EM RELIABILITY MODELING AT CIRCUIT LAYOUT LEVEL CONCLUSION DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT. ELECTROMIGRATION MODELING AT CIRCUIT LAYOUT LEVEL / TAN, CHER MING : 2013 ABSTRACT / INHALTSTEXT INTEGRATED CIRCUIT (IC) RELIABILITY IS OF INCREASING CONCERN IN PRESENT-DAY IC TECHNOLOGY WHERE THE INTERCONNECT FAILURES SIGNIFICANTLY INCREASES THE FAILURE RATE FOR ICS WITH DECREASING INTERCONNECT DIMENSION AND INCREASING NUMBER OF INTERCONNECT LEVELS. ELECTROMIGRATION (EM) OF INTERCONNECTS HAS NOW BECOME THE DOMINANT FAILURE MECHANISM THAT DETERMINES THE CIRCUIT RELIABILITY. THIS BRIEF ADDRESSES THE READERS TO THE NECESSITY OF 3D REAL CIRCUIT MODELLING IN ORDER TO EVALUATE THE EM OF INTERCONNECT SYSTEM IN ICS, AND HOW THEY CAN CREATE SUCH MODELS FOR THEIR OWN APPLICATIONS. A 3-DIMENSIONAL (3D) ELECTRO-THERMO-STRUCTURAL MODEL AS OPPOSED TO THE CONVENTIONAL CURRENT DENSITY BASED 2-DIMENSIONAL (2D) MODELS IS PRESENTED AT CIRCUIT-LAYOUT LEVEL. DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT.
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spellingShingle	Tan, Cher Ming Electromigration modeling at circuit layout level Ingenieurwissenschaften System safety Engineering
title	Electromigration modeling at circuit layout level
title_auth	Electromigration modeling at circuit layout level
title_exact_search	Electromigration modeling at circuit layout level
title_full	Electromigration modeling at circuit layout level Cher Ming Tan ; Feifei He
title_fullStr	Electromigration modeling at circuit layout level Cher Ming Tan ; Feifei He
title_full_unstemmed	Electromigration modeling at circuit layout level Cher Ming Tan ; Feifei He
title_short	Electromigration modeling at circuit layout level
title_sort	electromigration modeling at circuit layout level
topic	Ingenieurwissenschaften System safety Engineering
topic_facet	Ingenieurwissenschaften System safety Engineering
url	https://doi.org/10.1007/978-981-4451-21-5 http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=026131300&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=026131300&sequence=000003&line_number=0002&func_code=DB_RECORDS&service_type=MEDIA
work_keys_str_mv	AT tancherming electromigrationmodelingatcircuitlayoutlevel AT hefeifei electromigrationmodelingatcircuitlayoutlevel

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