Analysable Instruction Memories for Hard Real-Time Systems:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Abschlussarbeit Buch |
| Sprache: | English |
| Veröffentlicht: |
2012
|
| Schlagworte: | |
| Online-Zugang: | kostenfrei https://nbn-resolving.org/urn:nbn:de:bvb:384-opus4-20542 Inhaltsverzeichnis |
| Beschreibung: | 296 S. graph. Darst. |
Internformat
MARC
| LEADER | 00000nam a2200000 c 4500 | ||
|---|---|---|---|
| 001 | BV040878881 | ||
| 003 | DE-604 | ||
| 005 | 20130318 | ||
| 007 | t | ||
| 008 | 130313s2012 gw d||| m||| 00||| eng d | ||
| 035 | |a (OCoLC)835477545 | ||
| 035 | |a (DE-599)BVBBV040878881 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a eng | |
| 044 | |a gw |c XA-DE-BE | ||
| 049 | |a DE-384 |a DE-473 |a DE-703 |a DE-1051 |a DE-824 |a DE-29 |a DE-12 |a DE-91 |a DE-19 |a DE-1049 |a DE-92 |a DE-739 |a DE-898 |a DE-355 |a DE-706 |a DE-20 |a DE-1102 | ||
| 084 | |a ST 150 |0 (DE-625)143594: |2 rvk | ||
| 100 | 1 | |a Metzlaff, Stefan |d 1980- |e Verfasser |0 (DE-588)1032279567 |4 aut | |
| 245 | 1 | 0 | |a Analysable Instruction Memories for Hard Real-Time Systems |c von Stefan Metzlaff |
| 264 | 1 | |c 2012 | |
| 300 | |a 296 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 502 | |a Augsburg, Univ., Diss., 2012 | ||
| 650 | 0 | 7 | |a Echtzeitsystem |0 (DE-588)4131397-5 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Computerarchitektur |0 (DE-588)4048717-9 |2 gnd |9 rswk-swf |
| 655 | 7 | |0 (DE-588)4113937-9 |a Hochschulschrift |2 gnd-content | |
| 689 | 0 | 0 | |a Echtzeitsystem |0 (DE-588)4131397-5 |D s |
| 689 | 0 | 1 | |a Computerarchitektur |0 (DE-588)4048717-9 |D s |
| 689 | 0 | |5 DE-604 | |
| 776 | 0 | 8 | |i Erscheint auch als |n Online-Ausgabe |o urn:nbn:de:bvb:384-opus4-20542 |
| 856 | 4 | 1 | |u http://opus.bibliothek.uni-augsburg.de/opus4/frontdoor/index/index/docId/2054 |x Verlag |z kostenfrei |3 Volltext |
| 856 | 4 | |u https://nbn-resolving.org/urn:nbn:de:bvb:384-opus4-20542 |x Resolving-System | |
| 856 | 4 | 2 | |m DNB Datenaustausch |q application/pdf |u http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=025858687&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |3 Inhaltsverzeichnis |
| 912 | |a ebook | ||
| 999 | |a oai:aleph.bib-bvb.de:BVB01-025858687 | ||
Datensatz im Suchindex
| _version_ | 1804150160951869440 |
|---|---|
| adam_text | IMAGE 1
TABLE O F CONTENTS
LIST O F A B B R E V I A T I O N S 1 3
1 I N T R O D U C T I O N 1 5
1.1 MOTIVATION 15
1.2 OUTLINE 17
2 R E A L - T I M E C A P A B L E M E M O R I E S I N E M B E D D E D S
Y S T E M S 1 9
2.1 MEMORY HIERARCHIES IN EMBEDDED SYSTEMS 19
2.2 MEMORY TERMINOLOGY AND SHORT INTRODUCTION 21
2.3 REAL-TIME CAPABLE INSTRUCTION MEMORIES 22
2.3.1 INSTRUCTION CACHES 22
2.3.2 STATIC SCRATCHPADS 31
2.3.3 SOFTWARE-MANAGED SCRATCHPADS 34
2.3.4 HARDWARE-MANAGED SCRATCHPADS 36
2.4 DATA MEMORIES IN REAL-TIME SYSTEMS 37
2.4.1 CACHES 37
2.4.2 SCRATCHPADS 37
2.5 OFF-CHIP MEMORIES IN REAL-TIME SYSTEMS 39
2.6 WORST CASE EXECUTION TIME ANALYSIS 40
2.6.1 STATIC WCET ANALYSIS 41
2.6.2 MEASUREMENT-BASED WCET ANALYSIS 43
2.6.3 WCET ANALYSIS TOOLS 44
2.7 MEMORY HIERARCHY DESIGN AND WCET ANALYSIS 48
3 D Y N A M I C I N S T R U C T I O N S C R A T C H P A D 5 1
3.1 OVERVIEW 51
3.2 ARCHITECTURE 53
3.2.1 FUNCTION MAPPING 53
3.2.2 FETCH CONTROL 54
3.2.3 CONTENT MANAGEMENT 55
3.2.4 REPLACEMENT POLICIES 59
3.3 IMPLEMENTATION 62
3.3.1 IMPLEMENTATION REQUIREMENTS 62
3.3.2 HOST PROCESSOR INTEGRATION 66
3.3.3 FETCH CONTROL 70
3.3.4 CONTENT MANAGEMENT 71
HTTP://D-NB.INFO/1035624915
IMAGE 2
4 A N A L Y S I S O F I N S T R U C T I O N M E M O R I E S 8 3
4.1 ANALYSIS AND ASSIGNMENT OF STATIC SCRATCHPADS 83
4.1.1 ASSIGNMENT OF STATIC MEMORY CONTENT 83
4.1.2 FUNCTION-BASED ASSIGNMENT 90
4.1.3 BASIC-BLOCK-BASED ASSIGNMENT 91
4.2 ANALYSIS OF CACHE REPLACEMENT POLICIES 99
4.2.1 MEMORY ANALYSIS USING ABSTRACT INTERPRETATION 99
4.2.2 LRU REPLACEMENT POLICY 100
4.2.3 FIFO REPLACEMENT POLICY 106
4.2.4 DIRECT MAPPED REPLACEMENT 109
4.3 ANALYSIS OF D-ISP REPLACEMENT POLICIES 112
4.3.1 LRU REPLACEMENT POLICY 113
4.3.2 FIFO REPLACEMENT POLICY 126
4.3.3 STACK-BASED REPLACEMENT POLICY 128
4.3.4 SENSITIVITY OF THE D-ISP MEMORY ON UNKNOWN STATES 128
5 TOOLCHAIN FOR T H E D Y N A M I C I N S T R U C T I O N SCRATCHPAD 1 3
5
5.1 FUNCTION SIZE INSTRUMENTATION 135
5.1.1 COMPILE-CHAIN INSTRUMENTATION 137
5.1.2 POST-LINK INSTRUMENTATION 138
5.1.3 QUANTIFICATION OF THE INSTRUMENTATION OVERHEAD 139
5.2 STATIC TIMING ANALYSIS TOOL FOR THE D-ISP 139
5.2.1 PROGRAM PARSING AND STRUCTURAL REPRESENTATION 140
5.2.2 PIPELINE EXECUTION COST ANALYSIS 141
5.2.3 INSTRUCTION MEMORY COST ANALYSIS 144
5.2.4 OFF-CHIP MEMORY COST 147
5.2.5 WCET ESTIMATION 148
5.2.6 VALIDATION OF THE CARCORE TIMING MODEL 148
5.3 APPLICATION REQUIREMENTS FOR THE D-ISP 152
5.3.1 APPLICATION PROGRAMMING AND SYSTEM GUIDELINES 152
5.3.2 CODE STYLE RESTRICTIONS 153
5.3.3 D-ISP CONTROL INTERFACE 153
5.3.4 LEGACY CODE COMPATIBILITY 154
6 EVALUATION 1 5 7
6.1 HARDWARE EFFORT ESTIMATION 157
6.1.1 EVALUATION METHODOLOGY 158
6.1.2 HARDWARE COMPLEXITY 159
6.1.3 MEMORY OVERHEAD 164
6.1.4 TIMING CHARACTERISTICS 167
6.1.5 HARDWARE EFFORT OF THE D-ISP WITH STACK-BASED REPLACEMENT 169
6.1.6 CONCLUSION 171
6.2 IMPACT ON THE WORST CASE EXECUTION TIME 172
6.2.1 EVALUATION METHODOLOGY 172
6.2.2 COMPARISON OF DIFFERENT S-ISP ASSIGNMENT ALGORITHMS 177
6.2.3 COMPARISON OF THE D-ISP WITH COMMON INSTRUCTION MEMORIES 182 6.2.4
WCET OVERHEAD OF THE D-ISP CONTENT MANAGEMENT 199
6.2.5 IMPACT OF THE OFF-CHIP MEMORY CONNECTION ON WCET ESTIMATES . . . .
201 6.2.6 COMPARISON OF DIFFERENT D-ISP REPLACEMENT POLICIES 204
IMAGE 3
6.2.7 IMPACT OF THE FUNCTION LOOKUP WIDTH ON THE WCET ESTIMATES 208
6.3 IMPACT ON THE AVERAGE CASE PERFORMANCE 210
6.3.1 EVALUATION METHODOLOGY 210
6.3.2 RESULTS 211
6.4 COMPLEXITY OF THE D-ISP MEMORY ANALYSIS 213
6.4.1 ANALYSIS MEMORY COST 213
6.4.2 ANALYSIS TIME 216
6.4.3 CONCLUSION 216
7 CONCLUSIONS A N D F U T U R E W O R K 2 1 7
7.1 CONCLUSIONS 217
7.2 FUTURE WORK 219
BIBLIOGRAPHY 2 2 1
LIST O F F I G U R E S 2 4 3
LIST O F TABLES 2 4 7
LIST O F A L G O R I T H M S 2 4 9
A S - I S P W C E T EVALUATIONS 2 5 1
A.L COMPARISON OF BBS-ISP ASSIGNMENT ALGORITHMS 251
A.2 COMPARISON OF FS-ISP ASSIGNMENT ALGORITHMS 260
B D - I S P W C E T EVALUATIONS 2 6 9
B.L NORMALISED WCET ESTIMATES 269
B.2 IMPACT OF THE OFF-CHIP MEMORY HIERARCHY 282
CURRICULUM V I T A E 2 9 7
|
| any_adam_object | 1 |
| author | Metzlaff, Stefan 1980- |
| author_GND | (DE-588)1032279567 |
| author_facet | Metzlaff, Stefan 1980- |
| author_role | aut |
| author_sort | Metzlaff, Stefan 1980- |
| author_variant | s m sm |
| building | Verbundindex |
| bvnumber | BV040878881 |
| classification_rvk | ST 150 |
| collection | ebook |
| ctrlnum | (OCoLC)835477545 (DE-599)BVBBV040878881 |
| discipline | Informatik |
| format | Thesis Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01834nam a2200409 c 4500</leader><controlfield tag="001">BV040878881</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20130318 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">130313s2012 gw d||| m||| 00||| eng d</controlfield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)835477545</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV040878881</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="044" ind1=" " ind2=" "><subfield code="a">gw</subfield><subfield code="c">XA-DE-BE</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-384</subfield><subfield code="a">DE-473</subfield><subfield code="a">DE-703</subfield><subfield code="a">DE-1051</subfield><subfield code="a">DE-824</subfield><subfield code="a">DE-29</subfield><subfield code="a">DE-12</subfield><subfield code="a">DE-91</subfield><subfield code="a">DE-19</subfield><subfield code="a">DE-1049</subfield><subfield code="a">DE-92</subfield><subfield code="a">DE-739</subfield><subfield code="a">DE-898</subfield><subfield code="a">DE-355</subfield><subfield code="a">DE-706</subfield><subfield code="a">DE-20</subfield><subfield code="a">DE-1102</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ST 150</subfield><subfield code="0">(DE-625)143594:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Metzlaff, Stefan</subfield><subfield code="d">1980-</subfield><subfield code="e">Verfasser</subfield><subfield code="0">(DE-588)1032279567</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Analysable Instruction Memories for Hard Real-Time Systems</subfield><subfield code="c">von Stefan Metzlaff</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="c">2012</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">296 S.</subfield><subfield code="b">graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="502" ind1=" " ind2=" "><subfield code="a">Augsburg, Univ., Diss., 2012</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Echtzeitsystem</subfield><subfield code="0">(DE-588)4131397-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Computerarchitektur</subfield><subfield code="0">(DE-588)4048717-9</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="655" ind1=" " ind2="7"><subfield code="0">(DE-588)4113937-9</subfield><subfield code="a">Hochschulschrift</subfield><subfield code="2">gnd-content</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Echtzeitsystem</subfield><subfield code="0">(DE-588)4131397-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Computerarchitektur</subfield><subfield code="0">(DE-588)4048717-9</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Online-Ausgabe</subfield><subfield code="o">urn:nbn:de:bvb:384-opus4-20542</subfield></datafield><datafield tag="856" ind1="4" ind2="1"><subfield code="u">http://opus.bibliothek.uni-augsburg.de/opus4/frontdoor/index/index/docId/2054</subfield><subfield code="x">Verlag</subfield><subfield code="z">kostenfrei</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="856" ind1="4" ind2=" "><subfield code="u">https://nbn-resolving.org/urn:nbn:de:bvb:384-opus4-20542</subfield><subfield code="x">Resolving-System</subfield></datafield><datafield tag="856" ind1="4" ind2="2"><subfield code="m">DNB Datenaustausch</subfield><subfield code="q">application/pdf</subfield><subfield code="u">http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=025858687&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA</subfield><subfield code="3">Inhaltsverzeichnis</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ebook</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-025858687</subfield></datafield></record></collection> |
| genre | (DE-588)4113937-9 Hochschulschrift gnd-content |
| genre_facet | Hochschulschrift |
| id | DE-604.BV040878881 |
| illustrated | Illustrated |
| indexdate | 2024-07-10T00:34:31Z |
| institution | BVB |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-025858687 |
| oclc_num | 835477545 |
| open_access_boolean | 1 |
| owner | DE-384 DE-473 DE-BY-UBG DE-703 DE-1051 DE-824 DE-29 DE-12 DE-91 DE-BY-TUM DE-19 DE-BY-UBM DE-1049 DE-92 DE-739 DE-898 DE-BY-UBR DE-355 DE-BY-UBR DE-706 DE-20 DE-1102 |
| owner_facet | DE-384 DE-473 DE-BY-UBG DE-703 DE-1051 DE-824 DE-29 DE-12 DE-91 DE-BY-TUM DE-19 DE-BY-UBM DE-1049 DE-92 DE-739 DE-898 DE-BY-UBR DE-355 DE-BY-UBR DE-706 DE-20 DE-1102 |
| physical | 296 S. graph. Darst. |
| psigel | ebook |
| publishDate | 2012 |
| publishDateSearch | 2012 |
| publishDateSort | 2012 |
| record_format | marc |
| spelling | Metzlaff, Stefan 1980- Verfasser (DE-588)1032279567 aut Analysable Instruction Memories for Hard Real-Time Systems von Stefan Metzlaff 2012 296 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Augsburg, Univ., Diss., 2012 Echtzeitsystem (DE-588)4131397-5 gnd rswk-swf Computerarchitektur (DE-588)4048717-9 gnd rswk-swf (DE-588)4113937-9 Hochschulschrift gnd-content Echtzeitsystem (DE-588)4131397-5 s Computerarchitektur (DE-588)4048717-9 s DE-604 Erscheint auch als Online-Ausgabe urn:nbn:de:bvb:384-opus4-20542 http://opus.bibliothek.uni-augsburg.de/opus4/frontdoor/index/index/docId/2054 Verlag kostenfrei Volltext https://nbn-resolving.org/urn:nbn:de:bvb:384-opus4-20542 Resolving-System DNB Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=025858687&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | Metzlaff, Stefan 1980- Analysable Instruction Memories for Hard Real-Time Systems Echtzeitsystem (DE-588)4131397-5 gnd Computerarchitektur (DE-588)4048717-9 gnd |
| subject_GND | (DE-588)4131397-5 (DE-588)4048717-9 (DE-588)4113937-9 |
| title | Analysable Instruction Memories for Hard Real-Time Systems |
| title_auth | Analysable Instruction Memories for Hard Real-Time Systems |
| title_exact_search | Analysable Instruction Memories for Hard Real-Time Systems |
| title_full | Analysable Instruction Memories for Hard Real-Time Systems von Stefan Metzlaff |
| title_fullStr | Analysable Instruction Memories for Hard Real-Time Systems von Stefan Metzlaff |
| title_full_unstemmed | Analysable Instruction Memories for Hard Real-Time Systems von Stefan Metzlaff |
| title_short | Analysable Instruction Memories for Hard Real-Time Systems |
| title_sort | analysable instruction memories for hard real time systems |
| topic | Echtzeitsystem (DE-588)4131397-5 gnd Computerarchitektur (DE-588)4048717-9 gnd |
| topic_facet | Echtzeitsystem Computerarchitektur Hochschulschrift |
| url | http://opus.bibliothek.uni-augsburg.de/opus4/frontdoor/index/index/docId/2054 https://nbn-resolving.org/urn:nbn:de:bvb:384-opus4-20542 http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=025858687&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
| work_keys_str_mv | AT metzlaffstefan analysableinstructionmemoriesforhardrealtimesystems |