Integrated circuit and system design: power and timing modeling, optimization and simulation ; 22nd international workshop, PATMOS 2012, Newcastle upon Tyne, UK, September 4 - 6, 2012 ; revised selected papers
Gespeichert in:
Weitere Verfasser: | |
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Format: | Tagungsbericht Buch |
Sprache: | English |
Veröffentlicht: |
Berlin [u.a.]
Springer
2013
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Schriftenreihe: | Lecture notes in computer science
7606 |
Schlagworte: | |
Online-Zugang: | Inhaltstext Inhaltsverzeichnis |
Beschreibung: | IX, 258 S. Ill., graph. Darst. |
ISBN: | 3642361560 9783642361562 |
Internformat
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adam_text |
IMAGE 1
T A B L E O F C O N T E N T S
SLEEP-TRANSISTOR BASED POWER-GATING TRADEOFF ANALYSES 1
SVEN ROSINGER AND WOLFGANG NEBEL
MODELLING AND ANALYSIS OF MANUFACTURING VARIABILITY EFFECTS FROM PROCESS
T O ARCHITECTURAL LEVEL 11
CHENXI NI, ZIYAD A L TARAWNEH, GORDON RUSSELL, AND ALEX BYSTROV
NON-INVASIVE POWER SIMULATION A T SYSTEM-LEVEL WITH SYSTEMC 21
DANIEL LORENZ, PHILIPP A. HARTMANN, K I M GRIITTNER, AND WOLFGANG NEBEL
A STANDARD CELL OPTIMIZATION METHOD FOR NEAR-THRESHOLD VOLTAGE
OPERATIONS 32
MASAHIRO KONDO, SHINICHI NISHIZAWA, TOHRU ISHIHARA, AND HIDETOSHI
ONODERA
AN EXTENDED METASTABILITY SIMULATION METHOD FOR SYNCHRONIZER
CHARACTERIZATION 42
SALOMON BEER AND R A N GINOSAR
PHASE SPACE BASED NBTI MODEL 52
REEF EILERS, MALTE METZDORF, SVEN ROSINGER, DOMENIK HELMS, AND WOLFGANG
NEBEL
FAST PROPAGATION OF HAMMING AND SIGNAL DISTANCES FOR REGISTER-TRANSFER
LEVEL DATAPATHS 62
AXEL REIMER, LARS KOSMANN, DANIEL LORENZ, AND WOLFGANG NEBEL
NOISE MARGIN BASED LIBRARY OPTIMIZATION CONSIDERING VARIABILITY IN
SUB-THRESHOLD 72
TOBIAS GEMMEKE, MARYAM ASHOUEI, AND TOBIAS G. NOLL
T C P WINDOW BASED DVFS FOR LOW POWER NETWORK CONTROLLER SOC . . . . 83
EYAL-ITZHAK NAVE AND RAN GINOSAR
ADAPTIVE SYNCHRONIZATION FOR DVFS APPLICATIONS 93
GHAITH TARAWNEH AND ALEX YAKOVLEV
MULLER C-ELEMENT METASTABILITY CONTAINMENT 103
THOMAS POLZER, ANDREAS STEININGER, AND JAKOB LECHNER
HTTP://D-NB.INFO/103008355X
IMAGE 2
V I I I
TABLE OF CONTENTS
LOW POWER IMPLEMENTATION OF TRIVIUM STREAM CIPHER 113
J.M. MORA-GUTIERREZ, C.J. JIMENEZ-FERNANDEZ, AND M. VALENCIA-BARRERO
A GENERIC ARCHITECTURE FOR ROBUST ASYNCHRONOUS COMMUNICATION LINKS 121
JAKOB LECHNER AND ROBERT NAJVIRT
DIRECT STATISTICAL SIMULATION OF TIMING PROPERTIES IN SEQUENTIAL
CIRCUITS 131
JAVIER RODRIGUEZ, QIN TANG, A M I R ZJAJO, MICHEL BERKELAAR, AND NICK
VAN DER MEIJS
PVTA TOLERANT SELF-ADAPTIVE CLOCK GENERATION ARCHITECTURE 142
JORDI PEREZ-PUIGDEMONT, ANTONIO CALOMARDE, AND FRANCESC MOLL
ON-CHIP NBTI AND P B T I TRACKING THROUGH AN ALL-DIGITAL AGING MONITOR
ARCHITECTURE 155
HOSSEIN KARIMIYAN ALIDASH, ANDREA CALIMERA, ALBERTO MACII, ENRICO MACII,
AND MASSIMO PONCINO
TWO-PHASE MOBILE INTERCONNECTION SCHEMES FOR ULTRA-GRAIN PIPELINE
APPLICATIONS 166
JUAN NUNEZ, MARIA J. AVEDILLO, AND JOSE M. QUINTANA
DESIGN OF A 150 MV SUPPLY, 2 MIPS, 90NM CMOS, ULTRA-LOW-POWER
MICROPROCESSOR 175
PIETER WECKX, NELE REYNDERS, USE DE MOFFARTS, AND WIM DEHAENE
RUN-TIME MEASUREMENT OF HARVESTED ENERGY FOR AUTARKIC SENSOR OPERATION
185
DIMITRIS BEKIARIS, IOANNIS KOSMADAKIS, GEORGE STASSINOPOULOS, DIMITRIOS
SOUDRIS, THEODOROS LAOPOULOS, GREGORY DOUMENIS, AND STYLIANOS SISKOS
LOW-POWER DELAY SENSORS ON FPGAS 194
PANAGIOTIS SAKELLARIOU AND VASSILIS PALIOURAS
OBSERVABILITY CONDITIONS AND AUTOMATIC OPERAND-ISOLATION IN
HIGH-THROUGHPUT ASYNCHRONOUS PIPELINES 205
ARASH SAIFHASHEMI AND PETER A. BEEREL
DYNAMIC POWER MANAGEMENT OF A COMPUTER WITH SELF POWER-MANAGED
COMPONENTS 215
MARYAM TRIKI, YANZHI WANG, AHMED C. AMMARI, AND MASSOUD PEDRAM
NETWORK TIME SYNCHRONIZATION: A FULL HARDWARE APPROACH 225
JORGE JUAN, JULIAN VIEJO, AND MANUEL J. BELLIDO
IMAGE 3
TABLE OF CONTENTS I X
CASE STUDIES OF LOGICAL COMPUTATION ON STOCHASTIC BIT STREAMS 235
PENG LI, WEIKANG QIAN, DAVID J. LILJA, KIA BAZARGAN, AND MARC D. RIEDEL
DRAIL: A NOVEL PHYSICAL LAYOUT METHODOLOGY FOR POWER GATED CIRCUITS 245
JATIN N. MISTRY, JOHN BIGGS, JAMES MYERS, BASHIR M. AL-HASHIMI, AND
DAVID FLYNN
A U T H O R I N D E X 257 |
any_adam_object | 1 |
author2 | Ayala, José L. |
author2_role | edt |
author2_variant | j l a jl jla |
author_facet | Ayala, José L. |
building | Verbundindex |
bvnumber | BV040794532 |
classification_rvk | SS 4800 |
classification_tum | ELT 352f DAT 190f |
ctrlnum | (OCoLC)835321913 (DE-599)DNB103008355X |
dewey-full | 621.395 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.395 |
dewey-search | 621.395 |
dewey-sort | 3621.395 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Informatik Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
format | Conference Proceeding Book |
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series | Lecture notes in computer science |
series2 | Lecture notes in computer science |
spelling | Integrated circuit and system design power and timing modeling, optimization and simulation ; 22nd international workshop, PATMOS 2012, Newcastle upon Tyne, UK, September 4 - 6, 2012 ; revised selected papers José L. Ayala ... (eds.) Berlin [u.a.] Springer 2013 IX, 258 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Lecture notes in computer science 7606 Zeitverhalten (DE-588)4238464-3 gnd rswk-swf Simulation (DE-588)4055072-2 gnd rswk-swf Entwurfsautomation (DE-588)4312536-0 gnd rswk-swf Leistungsbewertung (DE-588)4167271-9 gnd rswk-swf Power-Management (DE-588)7738882-3 gnd rswk-swf Zuverlässigkeit (DE-588)4059245-5 gnd rswk-swf Energieeffizienz (DE-588)7660153-5 gnd rswk-swf Rekonfiguration (DE-588)4306238-6 gnd rswk-swf (DE-588)1071861417 Konferenzschrift 2012 Newcastle-upon-Tyne gnd-content Entwurfsautomation (DE-588)4312536-0 s Rekonfiguration (DE-588)4306238-6 s Zeitverhalten (DE-588)4238464-3 s Simulation (DE-588)4055072-2 s Power-Management (DE-588)7738882-3 s Leistungsbewertung (DE-588)4167271-9 s DE-604 Zuverlässigkeit (DE-588)4059245-5 s Energieeffizienz (DE-588)7660153-5 s 1\p DE-604 Ayala, José L. edt PATMOS 22 2012 Newcastle-upon-Tyne Sonstige (DE-588)1032265280 oth Erscheint auch als Online-Ausgabe 978-3-642-36157-9 Lecture notes in computer science 7606 (DE-604)BV000000607 7606 X:MVB text/html http://deposit.dnb.de/cgi-bin/dokserv?id=4240461&prov=M&dok_var=1&dok_ext=htm Inhaltstext DNB Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=025774765&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
spellingShingle | Integrated circuit and system design power and timing modeling, optimization and simulation ; 22nd international workshop, PATMOS 2012, Newcastle upon Tyne, UK, September 4 - 6, 2012 ; revised selected papers Lecture notes in computer science Zeitverhalten (DE-588)4238464-3 gnd Simulation (DE-588)4055072-2 gnd Entwurfsautomation (DE-588)4312536-0 gnd Leistungsbewertung (DE-588)4167271-9 gnd Power-Management (DE-588)7738882-3 gnd Zuverlässigkeit (DE-588)4059245-5 gnd Energieeffizienz (DE-588)7660153-5 gnd Rekonfiguration (DE-588)4306238-6 gnd |
subject_GND | (DE-588)4238464-3 (DE-588)4055072-2 (DE-588)4312536-0 (DE-588)4167271-9 (DE-588)7738882-3 (DE-588)4059245-5 (DE-588)7660153-5 (DE-588)4306238-6 (DE-588)1071861417 |
title | Integrated circuit and system design power and timing modeling, optimization and simulation ; 22nd international workshop, PATMOS 2012, Newcastle upon Tyne, UK, September 4 - 6, 2012 ; revised selected papers |
title_auth | Integrated circuit and system design power and timing modeling, optimization and simulation ; 22nd international workshop, PATMOS 2012, Newcastle upon Tyne, UK, September 4 - 6, 2012 ; revised selected papers |
title_exact_search | Integrated circuit and system design power and timing modeling, optimization and simulation ; 22nd international workshop, PATMOS 2012, Newcastle upon Tyne, UK, September 4 - 6, 2012 ; revised selected papers |
title_full | Integrated circuit and system design power and timing modeling, optimization and simulation ; 22nd international workshop, PATMOS 2012, Newcastle upon Tyne, UK, September 4 - 6, 2012 ; revised selected papers José L. Ayala ... (eds.) |
title_fullStr | Integrated circuit and system design power and timing modeling, optimization and simulation ; 22nd international workshop, PATMOS 2012, Newcastle upon Tyne, UK, September 4 - 6, 2012 ; revised selected papers José L. Ayala ... (eds.) |
title_full_unstemmed | Integrated circuit and system design power and timing modeling, optimization and simulation ; 22nd international workshop, PATMOS 2012, Newcastle upon Tyne, UK, September 4 - 6, 2012 ; revised selected papers José L. Ayala ... (eds.) |
title_short | Integrated circuit and system design |
title_sort | integrated circuit and system design power and timing modeling optimization and simulation 22nd international workshop patmos 2012 newcastle upon tyne uk september 4 6 2012 revised selected papers |
title_sub | power and timing modeling, optimization and simulation ; 22nd international workshop, PATMOS 2012, Newcastle upon Tyne, UK, September 4 - 6, 2012 ; revised selected papers |
topic | Zeitverhalten (DE-588)4238464-3 gnd Simulation (DE-588)4055072-2 gnd Entwurfsautomation (DE-588)4312536-0 gnd Leistungsbewertung (DE-588)4167271-9 gnd Power-Management (DE-588)7738882-3 gnd Zuverlässigkeit (DE-588)4059245-5 gnd Energieeffizienz (DE-588)7660153-5 gnd Rekonfiguration (DE-588)4306238-6 gnd |
topic_facet | Zeitverhalten Simulation Entwurfsautomation Leistungsbewertung Power-Management Zuverlässigkeit Energieeffizienz Rekonfiguration Konferenzschrift 2012 Newcastle-upon-Tyne |
url | http://deposit.dnb.de/cgi-bin/dokserv?id=4240461&prov=M&dok_var=1&dok_ext=htm http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=025774765&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
volume_link | (DE-604)BV000000607 |
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