Reference-free CMOS pipeline analog-to-digital converters:
<p>This book shows that digitally assisted analog-to-digital converters are not the only way to cope with poor analog performance caused by technology scaling. It describes various analog design techniques that enhance the area and power efficiency without employing any type of digital calibra...
Gespeichert in:
1. Verfasser: | |
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Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
New York, NY [u.a.]
Springer
2013
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Schriftenreihe: | Analog circuits and signal processing
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Schlagworte: | |
Online-Zugang: | BTU01 FHA01 FHI01 FHN01 FHR01 FKE01 FWS01 UBY01 Volltext Inhaltsverzeichnis Abstract |
Zusammenfassung: | <p>This book shows that digitally assisted analog-to-digital converters are not the only way to cope with poor analog performance caused by technology scaling. It describes various analog design techniques that enhance the area and power efficiency without employing any type of digital calibration circuitry. These techniques consist of self-biasing for PVT enhancement, inverter-based design for improved speed/power ratio, gain-of-two obtained by voltage sum instead of charge redistribution, and current-mode reference shifting instead of voltage reference shifting. Together, these techniques allow enhancing the area and power efficiency of the main building blocks of a multiplying digital-to-analog converter (MDAC) based stage, namely, the flash quantizer, the amplifier, and the switched capacitor network of the MDAC. Complementing the theoretical analyses of the various techniques, a power efficient operational transconductance amplifier is implemented and experimentally characterized. Furthermore, a medium-low resolution reference-free high-speed time-interleaved pipeline ADC employing all mentioned design techniques and circuits is presented, implemented and experimentally characterized. This ADC is said to be reference-free because it precludes any reference voltage, therefore saving power and area, as reference circuits are not necessary. Experimental results demonstrate the potential of the techniques which enabled the implementation of area and power efficient circuits.</p><p><p>Describes various design techniques to enhance the power and area efficiency of building blocks for multiplying digital-to-analog converter (MDAC) based ADCs, such as Pipeline, Algorithmic, and multi-step Flash;</p><p>Enables analog designers to enhance the performance of a range of circuits, without employing any type of digital assistance (calibration);</p><p>Includes complete design flow of an ADC based on the proposed circuits and design techniques.</p><p> |
Beschreibung: | <p>Introduction -- General Overview of Pipeline Analog-to-Digital Converters -- Capacitor Mismatch-Insensitive Multiplying-DAC Topologies with Unity Feedback Factor -- Application of Circuit Enhancement Techniques to ADC Building Blocks -- Design of a 7-bit 1GS/s CMOS Two-Way Interleaved Pipeline ADC -- Integrated Prototypes and Experimental Results -- Conclusions.</p> |
Beschreibung: | 1 Online-Ressource (XVI, 182 p. 107 illus) |
ISBN: | 9781461434672 |
DOI: | 10.1007/978-1-4614-3467-2 |
Internformat
MARC
LEADER | 00000nmm a2200000zc 4500 | ||
---|---|---|---|
001 | BV040697799 | ||
003 | DE-604 | ||
005 | 00000000000000.0 | ||
007 | cr|uuu---uuuuu | ||
008 | 130124s2013 |||| o||u| ||||||eng d | ||
020 | |a 9781461434672 |c Online |9 978-1-4614-3467-2 | ||
024 | 7 | |a 10.1007/978-1-4614-3467-2 |2 doi | |
035 | |a (OCoLC)820469323 | ||
035 | |a (DE-599)BVBBV040697799 | ||
040 | |a DE-604 |b ger |e aacr | ||
041 | 0 | |a eng | |
049 | |a DE-898 |a DE-634 |a DE-573 |a DE-92 |a DE-Aug4 |a DE-859 |a DE-706 |a DE-863 | ||
082 | 0 | |a 621.3815 | |
100 | 1 | |a Figueiredo, Michael |e Verfasser |4 aut | |
245 | 1 | 0 | |a Reference-free CMOS pipeline analog-to-digital converters |c Michael Figueiredo ; João Goes ; Guiomar Evans |
264 | 1 | |a New York, NY [u.a.] |b Springer |c 2013 | |
300 | |a 1 Online-Ressource (XVI, 182 p. 107 illus) | ||
336 | |b txt |2 rdacontent | ||
337 | |b c |2 rdamedia | ||
338 | |b cr |2 rdacarrier | ||
490 | 0 | |a Analog circuits and signal processing | |
500 | |a <p>Introduction -- General Overview of Pipeline Analog-to-Digital Converters -- Capacitor Mismatch-Insensitive Multiplying-DAC Topologies with Unity Feedback Factor -- Application of Circuit Enhancement Techniques to ADC Building Blocks -- Design of a 7-bit 1GS/s CMOS Two-Way Interleaved Pipeline ADC -- Integrated Prototypes and Experimental Results -- Conclusions.</p> | ||
520 | |a <p>This book shows that digitally assisted analog-to-digital converters are not the only way to cope with poor analog performance caused by technology scaling. It describes various analog design techniques that enhance the area and power efficiency without employing any type of digital calibration circuitry. These techniques consist of self-biasing for PVT enhancement, inverter-based design for improved speed/power ratio, gain-of-two obtained by voltage sum instead of charge redistribution, and current-mode reference shifting instead of voltage reference shifting. Together, these techniques allow enhancing the area and power efficiency of the main building blocks of a multiplying digital-to-analog converter (MDAC) based stage, namely, the flash quantizer, the amplifier, and the switched capacitor network of the MDAC. Complementing the theoretical analyses of the various techniques, a power efficient operational transconductance amplifier is implemented and experimentally characterized. Furthermore, a medium-low resolution reference-free high-speed time-interleaved pipeline ADC employing all mentioned design techniques and circuits is presented, implemented and experimentally characterized. This ADC is said to be reference-free because it precludes any reference voltage, therefore saving power and area, as reference circuits are not necessary. Experimental results demonstrate the potential of the techniques which enabled the implementation of area and power efficient circuits.</p><p><p>Describes various design techniques to enhance the power and area efficiency of building blocks for multiplying digital-to-analog converter (MDAC) based ADCs, such as Pipeline, Algorithmic, and multi-step Flash;</p><p>Enables analog designers to enhance the performance of a range of circuits, without employing any type of digital assistance (calibration);</p><p>Includes complete design flow of an ADC based on the proposed circuits and design techniques.</p><p> | ||
650 | 4 | |a Ingenieurwissenschaften | |
650 | 4 | |a Engineering | |
650 | 4 | |a Electronics | |
650 | 4 | |a Systems engineering | |
700 | 1 | |a Goes, João |e Sonstige |4 oth | |
700 | 1 | |a Evans, Guiomar |e Sonstige |4 oth | |
776 | 0 | 8 | |i Erscheint auch als |n Druckausgabe |z 978-1-4614-3466-5 |
856 | 4 | 0 | |u https://doi.org/10.1007/978-1-4614-3467-2 |x Verlag |3 Volltext |
856 | 4 | 2 | |m Springer Fremddatenuebernahme |q application/pdf |u http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=025678393&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |3 Inhaltsverzeichnis |
856 | 4 | 2 | |m Springer Fremddatenuebernahme |q application/pdf |u http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=025678393&sequence=000003&line_number=0002&func_code=DB_RECORDS&service_type=MEDIA |3 Abstract |
912 | |a ZDB-2-ENG | ||
999 | |a oai:aleph.bib-bvb.de:BVB01-025678393 | ||
966 | e | |u https://doi.org/10.1007/978-1-4614-3467-2 |l BTU01 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-1-4614-3467-2 |l FHA01 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-1-4614-3467-2 |l FHI01 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-1-4614-3467-2 |l FHN01 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-1-4614-3467-2 |l FHR01 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-1-4614-3467-2 |l FKE01 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-1-4614-3467-2 |l FWS01 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-1-4614-3467-2 |l UBY01 |p ZDB-2-ENG |x Verlag |3 Volltext |
Datensatz im Suchindex
DE-BY-FWS_katkey | 923301 |
---|---|
_version_ | 1806194905835372544 |
adam_text | REFERENCE-FREE CMOS PIPELINE ANALOG-TO-DIGITAL CONVERTERS
/ FIGUEIREDO, MICHAEL
: 2013
TABLE OF CONTENTS / INHALTSVERZEICHNIS
INTRODUCTION
GENERAL OVERVIEW OF PIPELINE ANALOG-TO-DIGITAL CONVERTERS
CAPACITOR MISMATCH-INSENSITIVE MULTIPLYING-DAC TOPOLOGIES WITH UNITY
FEEDBACK FACTOR
APPLICATION OF CIRCUIT ENHANCEMENT TECHNIQUES TO ADC BUILDING BLOCKS
DESIGN OF A 7-BIT 1GS/S CMOS TWO-WAY INTERLEAVED PIPELINE ADC
INTEGRATED PROTOTYPES AND EXPERIMENTAL RESULTS
CONCLUSIONS
DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT.
REFERENCE-FREE CMOS PIPELINE ANALOG-TO-DIGITAL CONVERTERS
/ FIGUEIREDO, MICHAEL
: 2013
ABSTRACT / INHALTSTEXT
THIS BOOK SHOWS THAT DIGITALLY ASSISTED ANALOG-TO-DIGITAL CONVERTERS ARE
NOT THE ONLY WAY TO COPE WITH POOR ANALOG PERFORMANCE CAUSED BY
TECHNOLOGY SCALING. IT DESCRIBES VARIOUS ANALOG DESIGN TECHNIQUES THAT
ENHANCE THE AREA AND POWER EFFICIENCY WITHOUT EMPLOYING ANY TYPE OF
DIGITAL CALIBRATION CIRCUITRY. THESE TECHNIQUES CONSIST OF SELF-BIASING
FOR PVT ENHANCEMENT, INVERTER-BASED DESIGN FOR IMPROVED SPEED/POWER
RATIO, GAIN-OF-TWO OBTAINED BY VOLTAGE SUM INSTEAD OF CHARGE
REDISTRIBUTION, AND CURRENT-MODE REFERENCE SHIFTING INSTEAD OF VOLTAGE
REFERENCE SHIFTING. TOGETHER, THESE TECHNIQUES ALLOW ENHANCING THE AREA
AND POWER EFFICIENCY OF THE MAIN BUILDING BLOCKS OF A MULTIPLYING
DIGITAL-TO-ANALOG CONVERTER (MDAC) BASED STAGE, NAMELY, THE FLASH
QUANTIZER, THE AMPLIFIER, AND THE SWITCHED CAPACITOR NETWORK OF THE
MDAC. COMPLEMENTING THE THEORETICAL ANALYSES OF THE VARIOUS TECHNIQUES,
A POWER EFFICIENT OPERATIONAL TRANSCONDUCTANCE AMPLIFIER IS IMPLEMENTED
AND EXPERIMENTALLY CHARACTERIZED. FURTHERMORE, A MEDIUM-LOW RESOLUTION
REFERENCE-FREE HIGH-SPEED TIME-INTERLEAVED PIPELINE ADC EMPLOYING ALL
MENTIONED DESIGN TECHNIQUES AND CIRCUITS IS PRESENTED, IMPLEMENTED AND
EXPERIMENTALLY CHARACTERIZED. THIS ADC IS SAID TO BE REFERENCE-FREE
BECAUSE IT PRECLUDES ANY REFERENCE VOLTAGE, THEREFORE SAVING POWER AND
AREA, AS REFERENCE CIRCUITS ARE NOT NECESSARY. EXPERIMENTAL RESULTS
DEMONSTRATE THE POTENTIAL OF THE TECHNIQUES WHICH ENABLED THE
IMPLEMENTATION OF AREA AND POWER EFFICIENT CIRCUITS. DESCRIBES VARIOUS
DESIGN TECHNIQUES TO ENHANCE THE POWER AND AREA EFFICIENCY OF BUILDING
BLOCKS FOR MULTIPLYING DIGITAL-TO-ANALOG CONVERTER (MDAC) BASED ADCS,
SUCH AS PIPELINE, ALGORITHMIC, AND MULTI-STEP FLASH; ENABLES ANALOG
DESIGNERS TO ENHANCE THE PERFORMANCE OF A RANGE OF CIRCUITS, WITHOUT
EMPLOYING ANY TYPE OF DIGITAL ASSISTANCE (CALIBRATION); INCLUDES
COMPLETE DESIGN FLOW OF AN ADC BASED ON THE PROPOSED CIRCUITS AND DESIGN
TECHNIQUES
DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT.
|
any_adam_object | 1 |
author | Figueiredo, Michael |
author_facet | Figueiredo, Michael |
author_role | aut |
author_sort | Figueiredo, Michael |
author_variant | m f mf |
building | Verbundindex |
bvnumber | BV040697799 |
collection | ZDB-2-ENG |
ctrlnum | (OCoLC)820469323 (DE-599)BVBBV040697799 |
dewey-full | 621.3815 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.3815 |
dewey-search | 621.3815 |
dewey-sort | 3621.3815 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
doi_str_mv | 10.1007/978-1-4614-3467-2 |
format | Electronic eBook |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>05020nmm a2200541zc 4500</leader><controlfield tag="001">BV040697799</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">130124s2013 |||| o||u| ||||||eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781461434672</subfield><subfield code="c">Online</subfield><subfield code="9">978-1-4614-3467-2</subfield></datafield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">10.1007/978-1-4614-3467-2</subfield><subfield code="2">doi</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)820469323</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV040697799</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">aacr</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-898</subfield><subfield code="a">DE-634</subfield><subfield code="a">DE-573</subfield><subfield code="a">DE-92</subfield><subfield code="a">DE-Aug4</subfield><subfield code="a">DE-859</subfield><subfield code="a">DE-706</subfield><subfield code="a">DE-863</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.3815</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Figueiredo, Michael</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Reference-free CMOS pipeline analog-to-digital converters</subfield><subfield code="c">Michael Figueiredo ; João Goes ; Guiomar Evans</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">New York, NY [u.a.]</subfield><subfield code="b">Springer</subfield><subfield code="c">2013</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 Online-Ressource (XVI, 182 p. 107 illus)</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="0" ind2=" "><subfield code="a">Analog circuits and signal processing</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a"><p>Introduction -- General Overview of Pipeline Analog-to-Digital Converters -- Capacitor Mismatch-Insensitive Multiplying-DAC Topologies with Unity Feedback Factor -- Application of Circuit Enhancement Techniques to ADC Building Blocks -- Design of a 7-bit 1GS/s CMOS Two-Way Interleaved Pipeline ADC -- Integrated Prototypes and Experimental Results -- Conclusions.</p></subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a"><p>This book shows that digitally assisted analog-to-digital converters are not the only way to cope with poor analog performance caused by technology scaling. It describes various analog design techniques that enhance the area and power efficiency without employing any type of digital calibration circuitry. These techniques consist of self-biasing for PVT enhancement, inverter-based design for improved speed/power ratio, gain-of-two obtained by voltage sum instead of charge redistribution, and current-mode reference shifting instead of voltage reference shifting. Together, these techniques allow enhancing the area and power efficiency of the main building blocks of a multiplying digital-to-analog converter (MDAC) based stage, namely, the flash quantizer, the amplifier, and the switched capacitor network of the MDAC. Complementing the theoretical analyses of the various techniques, a power efficient operational transconductance amplifier is implemented and experimentally characterized. Furthermore, a medium-low resolution reference-free high-speed time-interleaved pipeline ADC employing all mentioned design techniques and circuits is presented, implemented and experimentally characterized. This ADC is said to be reference-free because it precludes any reference voltage, therefore saving power and area, as reference circuits are not necessary. Experimental results demonstrate the potential of the techniques which enabled the implementation of area and power efficient circuits.</p><p><p>Describes various design techniques to enhance the power and area efficiency of building blocks for multiplying digital-to-analog converter (MDAC) based ADCs, such as Pipeline, Algorithmic, and multi-step Flash;</p><p>Enables analog designers to enhance the performance of a range of circuits, without employing any type of digital assistance (calibration);</p><p>Includes complete design flow of an ADC based on the proposed circuits and design techniques.</p><p></subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Ingenieurwissenschaften</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronics</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Systems engineering</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Goes, João</subfield><subfield code="e">Sonstige</subfield><subfield code="4">oth</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Evans, Guiomar</subfield><subfield code="e">Sonstige</subfield><subfield code="4">oth</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druckausgabe</subfield><subfield code="z">978-1-4614-3466-5</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">https://doi.org/10.1007/978-1-4614-3467-2</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="856" ind1="4" ind2="2"><subfield code="m">Springer Fremddatenuebernahme</subfield><subfield code="q">application/pdf</subfield><subfield code="u">http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=025678393&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA</subfield><subfield code="3">Inhaltsverzeichnis</subfield></datafield><datafield tag="856" ind1="4" ind2="2"><subfield code="m">Springer Fremddatenuebernahme</subfield><subfield code="q">application/pdf</subfield><subfield code="u">http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=025678393&sequence=000003&line_number=0002&func_code=DB_RECORDS&service_type=MEDIA</subfield><subfield code="3">Abstract</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-2-ENG</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-025678393</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-1-4614-3467-2</subfield><subfield code="l">BTU01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-1-4614-3467-2</subfield><subfield code="l">FHA01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-1-4614-3467-2</subfield><subfield code="l">FHI01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-1-4614-3467-2</subfield><subfield code="l">FHN01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-1-4614-3467-2</subfield><subfield code="l">FHR01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-1-4614-3467-2</subfield><subfield code="l">FKE01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-1-4614-3467-2</subfield><subfield code="l">FWS01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-1-4614-3467-2</subfield><subfield code="l">UBY01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield></record></collection> |
id | DE-604.BV040697799 |
illustrated | Not Illustrated |
indexdate | 2024-08-01T16:14:51Z |
institution | BVB |
isbn | 9781461434672 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-025678393 |
oclc_num | 820469323 |
open_access_boolean | |
owner | DE-898 DE-BY-UBR DE-634 DE-573 DE-92 DE-Aug4 DE-859 DE-706 DE-863 DE-BY-FWS |
owner_facet | DE-898 DE-BY-UBR DE-634 DE-573 DE-92 DE-Aug4 DE-859 DE-706 DE-863 DE-BY-FWS |
physical | 1 Online-Ressource (XVI, 182 p. 107 illus) |
psigel | ZDB-2-ENG |
publishDate | 2013 |
publishDateSearch | 2013 |
publishDateSort | 2013 |
publisher | Springer |
record_format | marc |
series2 | Analog circuits and signal processing |
spellingShingle | Figueiredo, Michael Reference-free CMOS pipeline analog-to-digital converters Ingenieurwissenschaften Engineering Electronics Systems engineering |
title | Reference-free CMOS pipeline analog-to-digital converters |
title_auth | Reference-free CMOS pipeline analog-to-digital converters |
title_exact_search | Reference-free CMOS pipeline analog-to-digital converters |
title_full | Reference-free CMOS pipeline analog-to-digital converters Michael Figueiredo ; João Goes ; Guiomar Evans |
title_fullStr | Reference-free CMOS pipeline analog-to-digital converters Michael Figueiredo ; João Goes ; Guiomar Evans |
title_full_unstemmed | Reference-free CMOS pipeline analog-to-digital converters Michael Figueiredo ; João Goes ; Guiomar Evans |
title_short | Reference-free CMOS pipeline analog-to-digital converters |
title_sort | reference free cmos pipeline analog to digital converters |
topic | Ingenieurwissenschaften Engineering Electronics Systems engineering |
topic_facet | Ingenieurwissenschaften Engineering Electronics Systems engineering |
url | https://doi.org/10.1007/978-1-4614-3467-2 http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=025678393&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=025678393&sequence=000003&line_number=0002&func_code=DB_RECORDS&service_type=MEDIA |
work_keys_str_mv | AT figueiredomichael referencefreecmospipelineanalogtodigitalconverters AT goesjoao referencefreecmospipelineanalogtodigitalconverters AT evansguiomar referencefreecmospipelineanalogtodigitalconverters |