Nanometer variation-tolerant SRAM: circuits and statistical design for yield
<p>Variability is one of the most challenging obstacles for IC design in the nanometer regime. In nanometer technologies, SRAM show an increased sensitivity to process variations due to low-voltage operation requirements, which are aggravated by the strong demand for lower power consumption a...
Gespeichert in:
| 1. Verfasser: | |
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| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
New York, NY [u.a.]
Springer
2013
|
| Schlagworte: | |
| Online-Zugang: | BTU01 FHA01 FHI01 FHN01 FHR01 FKE01 FWS01 UBY01 Volltext Inhaltsverzeichnis Abstract |
| Zusammenfassung: | <p>Variability is one of the most challenging obstacles for IC design in the nanometer regime. In nanometer technologies, SRAM show an increased sensitivity to process variations due to low-voltage operation requirements, which are aggravated by the strong demand for lower power consumption and cost, while achieving higher performance and density. With the drastic increase in memory densities, lower supply voltages, and higher variations, statistical simulation methodologies become imperative to estimate memory yield and optimize performance and power.</p><p>This book<b> </b>is an invaluable reference on robust SRAM circuits and statistical design methodologies for researchers and practicing engineers in the field of memory design. It combines state of the art circuit techniques and statistical methodologies to optimize<b> </b>SRAM performance and yield in nanometer technologies. </p><ul><li>Provides comprehensive review of state-of-the-art, variation-tolerant SRAM circuit techniques; </li><li>Discusses Impact of device related process variations and how they affect circuit and system performance, from a design point of view;</li><li>Helps designers optimize memory yield, with practical statistical design methodologies and yield estimation techniques.</li></ul> |
| Beschreibung: | Introduction -- Variability in Nanometer Technologies and Impact on SRAM -- Variarion-Tolerant SRAM Write and Read Assist Techniques -- Reducing SRAM Power using Fine-Grained Wordline Pulse Width Control -- A Methodology for Statistical Estimation of Read Access Yield in SRAMs -- Characterization of SRAM Sense Amplifier Input Offset for Yield Prediction |
| Beschreibung: | 1 Online-Ressource (XVI, 170 p. 153 illus., 6 illus. in color) |
| ISBN: | 9781461417491 |
| DOI: | 10.1007/978-1-4614-1749-1 |
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Datensatz im Suchindex
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|---|---|
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| adam_text | NANOMETER VARIATION-TOLERANT SRAM
/ ABU-RAHMA, MOHAMED H.
: 2013
TABLE OF CONTENTS / INHALTSVERZEICHNIS
INTRODUCTION
VARIABILITY IN NANOMETER TECHNOLOGIES AND IMPACT ON SRAM
VARIARION-TOLERANT SRAM WRITE AND READ ASSIST TECHNIQUES
REDUCING SRAM POWER USING FINE-GRAINED WORDLINE PULSE WIDTH CONTROL
A METHODOLOGY FOR STATISTICAL ESTIMATION OF READ ACCESS YIELD IN SRAMS
CHARACTERIZATION OF SRAM SENSE AMPLIFIER INPUT OFFSET FOR YIELD
PREDICTION
DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT.
NANOMETER VARIATION-TOLERANT SRAM
/ ABU-RAHMA, MOHAMED H.
: 2013
ABSTRACT / INHALTSTEXT
VARIABILITY IS ONE OF THE MOST CHALLENGING OBSTACLES FOR IC DESIGN IN
THE NANOMETER REGIME. IN NANOMETER TECHNOLOGIES, SRAM SHOW AN
INCREASED SENSITIVITY TO PROCESS VARIATIONS DUE TO LOW-VOLTAGE OPERATION
REQUIREMENTS, WHICH ARE AGGRAVATED BY THE STRONG DEMAND FOR LOWER POWER
CONSUMPTION AND COST, WHILE ACHIEVING HIGHER PERFORMANCE AND DENSITY.
WITH THE DRASTIC INCREASE IN MEMORY DENSITIES, LOWER SUPPLY VOLTAGES,
AND HIGHER VARIATIONS, STATISTICAL SIMULATION METHODOLOGIES BECOME
IMPERATIVE TO ESTIMATE MEMORY YIELD AND OPTIMIZE PERFORMANCE AND POWER.
THIS BOOK IS AN INVALUABLE REFERENCE ON ROBUST SRAM CIRCUITS AND
STATISTICAL DESIGN METHODOLOGIES FOR RESEARCHERS AND PRACTICING
ENGINEERS IN THE FIELD OF MEMORY DESIGN. IT COMBINES STATE OF THE ART
CIRCUIT TECHNIQUES AND STATISTICAL METHODOLOGIES TO OPTIMIZE SRAM
PERFORMANCE AND YIELD IN NANOMETER TECHNOLOGIES. PROVIDES
COMPREHENSIVE REVIEW OF STATE-OF-THE-ART, VARIATION-TOLERANT SRAM
CIRCUIT TECHNIQUES; DISCUSSES IMPACT OF DEVICE RELATED PROCESS
VARIATIONS AND HOW THEY AFFECT CIRCUIT AND SYSTEM PERFORMANCE, FROM A
DESIGN POINT OF VIEW; HELPS DESIGNERS OPTIMIZE MEMORY YIELD, WITH
PRACTICAL STATISTICAL DESIGN METHODOLOGIES AND YIELD ESTIMATION
TECHNIQUES
DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT.
|
| any_adam_object | 1 |
| author | Abū-Raḥma, Muḥammad |
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| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
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| illustrated | Not Illustrated |
| indexdate | 2024-08-01T16:14:51Z |
| institution | BVB |
| isbn | 9781461417491 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-025674530 |
| oclc_num | 820480362 |
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| physical | 1 Online-Ressource (XVI, 170 p. 153 illus., 6 illus. in color) |
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| publisher | Springer |
| record_format | marc |
| spellingShingle | Abū-Raḥma, Muḥammad Nanometer variation-tolerant SRAM circuits and statistical design for yield Ingenieurwissenschaften Engineering Computer aided design Systems engineering |
| title | Nanometer variation-tolerant SRAM circuits and statistical design for yield |
| title_auth | Nanometer variation-tolerant SRAM circuits and statistical design for yield |
| title_exact_search | Nanometer variation-tolerant SRAM circuits and statistical design for yield |
| title_full | Nanometer variation-tolerant SRAM circuits and statistical design for yield Mohamed H. Abu-Rahma ; Mohab Anis |
| title_fullStr | Nanometer variation-tolerant SRAM circuits and statistical design for yield Mohamed H. Abu-Rahma ; Mohab Anis |
| title_full_unstemmed | Nanometer variation-tolerant SRAM circuits and statistical design for yield Mohamed H. Abu-Rahma ; Mohab Anis |
| title_short | Nanometer variation-tolerant SRAM |
| title_sort | nanometer variation tolerant sram circuits and statistical design for yield |
| title_sub | circuits and statistical design for yield |
| topic | Ingenieurwissenschaften Engineering Computer aided design Systems engineering |
| topic_facet | Ingenieurwissenschaften Engineering Computer aided design Systems engineering |
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