Partial reconfiguration on FPGAs: architectures, tools and applications
<p>This is the first book to focus on designing run-time reconfigurable systems on FPGAs, in order to gain resource and power efficiency, as well as to improve speed. Case studies in partial reconfiguration guide readers through the FPGA jungle, straight toward a working system. The discussi...
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
New York, NY [u.a.]
Springer
2013
|
| Schriftenreihe: | Lecture notes in electrical engineering
153 |
| Schlagworte: | |
| Online-Zugang: | BTU01 FHA01 FHI01 FHN01 FHR01 FKE01 FWS01 UBY01 Volltext Inhaltsverzeichnis Abstract |
| Zusammenfassung: | <p>This is the first book to focus on designing run-time reconfigurable systems on FPGAs, in order to gain resource and power efficiency, as well as to improve speed. Case studies in partial reconfiguration guide readers through the FPGA jungle, straight toward a working system. The discussion of partial reconfiguration is comprehensive and practical, with models introduced together with methods to implement efficiently the corresponding systems. Coverage includes concepts for partial module integration and corresponding communication architectures, floorplanning of the on-FPGA resources, physical implementation aspects starting from constraining primitive placement and routing all the way down to the bitstream required to configure the FPGA, and verification of reconfigurable systems.</p><p> </p><ul><li>Provides comprehensive overview of state-of-the-art partial run-time reconfiguration techniques, including architectures, methods, and tools; </li><li>Focuses on real applications that will benefit from partial reconfiguration; </li><li>Describes methods and tools to implement efficient, reconfigurable systems that can substantially improve cost, power consumption, or speed (throughput/latency);</li><li>Includes practical use-cases that act as design patterns for a wide range of applications.</li></ul><p> </p><p> |
| Beschreibung: | Preemptive Hardware Task execution -- Intra-FPGA Communication Architectures for Reconfigurable Systems -- Building Partially Reconfigurable Systems – Methods and Tools -- Applications and Use Cases |
| Beschreibung: | 1 Online-Ressource (XV, 295 p. 158 illus) |
| ISBN: | 9781461412250 |
| DOI: | 10.1007/978-1-4614-1225-0 |
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| adam_text | PARTIAL RECONFIGURATION ON FPGAS
/ KOCH, DIRK
: 2013
TABLE OF CONTENTS / INHALTSVERZEICHNIS
PREEMPTIVE HARDWARE TASK EXECUTION
INTRA-FPGA COMMUNICATION ARCHITECTURES FOR RECONFIGURABLE SYSTEMS
BUILDING PARTIALLY RECONFIGURABLE SYSTEMS – METHODS AND TOOLS
APPLICATIONS AND USE CASES
DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT.
PARTIAL RECONFIGURATION ON FPGAS
/ KOCH, DIRK
: 2013
ABSTRACT / INHALTSTEXT
THIS IS THE FIRST BOOK TO FOCUS ON DESIGNING RUN-TIME RECONFIGURABLE
SYSTEMS ON FPGAS, IN ORDER TO GAIN RESOURCE AND POWER EFFICIENCY, AS
WELL AS TO IMPROVE SPEED. CASE STUDIES IN PARTIAL RECONFIGURATION
GUIDE READERS THROUGH THE FPGA JUNGLE, STRAIGHT TOWARD A WORKING
SYSTEM. THE DISCUSSION OF PARTIAL RECONFIGURATION IS COMPREHENSIVE AND
PRACTICAL, WITH MODELS INTRODUCED TOGETHER WITH METHODS TO IMPLEMENT
EFFICIENTLY THE CORRESPONDING SYSTEMS. COVERAGE INCLUDES CONCEPTS FOR
PARTIAL MODULE INTEGRATION AND CORRESPONDING COMMUNICATION
ARCHITECTURES, FLOORPLANNING OF THE ON-FPGA RESOURCES, PHYSICAL
IMPLEMENTATION ASPECTS STARTING FROM CONSTRAINING PRIMITIVE PLACEMENT
AND ROUTING ALL THE WAY DOWN TO THE BITSTREAM REQUIRED TO CONFIGURE THE
FPGA, AND VERIFICATION OF RECONFIGURABLE SYSTEMS. PROVIDES
COMPREHENSIVE OVERVIEW OF STATE-OF-THE-ART PARTIAL RUN-TIME
RECONFIGURATION TECHNIQUES, INCLUDING ARCHITECTURES, METHODS, AND TOOLS;
FOCUSES ON REAL APPLICATIONS THAT WILL BENEFIT FROM PARTIAL
RECONFIGURATION; DESCRIBES METHODS AND TOOLS TO IMPLEMENT EFFICIENT,
RECONFIGURABLE SYSTEMS THAT CAN SUBSTANTIALLY IMPROVE COST, POWER
CONSUMPTION, OR SPEED (THROUGHPUT/LATENCY); INCLUDES PRACTICAL USE-CASES
THAT ACT AS DESIGN PATTERNS FOR A WIDE RANGE OF APPLICATIONS.
DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT.
|
| any_adam_object | 1 |
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| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
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| id | DE-604.BV040690891 |
| illustrated | Not Illustrated |
| indexdate | 2024-08-01T16:14:51Z |
| institution | BVB |
| isbn | 9781461412250 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-025671655 |
| oclc_num | 820467114 |
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| physical | 1 Online-Ressource (XV, 295 p. 158 illus) |
| psigel | ZDB-2-ENG |
| publishDate | 2013 |
| publishDateSearch | 2013 |
| publishDateSort | 2013 |
| publisher | Springer |
| record_format | marc |
| series | Lecture notes in electrical engineering |
| series2 | Lecture notes in electrical engineering |
| spellingShingle | Koch, Dirk Partial reconfiguration on FPGAs architectures, tools and applications Lecture notes in electrical engineering Informatik Ingenieurwissenschaften Engineering Computer science Electronics Systems engineering |
| title | Partial reconfiguration on FPGAs architectures, tools and applications |
| title_auth | Partial reconfiguration on FPGAs architectures, tools and applications |
| title_exact_search | Partial reconfiguration on FPGAs architectures, tools and applications |
| title_full | Partial reconfiguration on FPGAs architectures, tools and applications Dirk Koch |
| title_fullStr | Partial reconfiguration on FPGAs architectures, tools and applications Dirk Koch |
| title_full_unstemmed | Partial reconfiguration on FPGAs architectures, tools and applications Dirk Koch |
| title_short | Partial reconfiguration on FPGAs |
| title_sort | partial reconfiguration on fpgas architectures tools and applications |
| title_sub | architectures, tools and applications |
| topic | Informatik Ingenieurwissenschaften Engineering Computer science Electronics Systems engineering |
| topic_facet | Informatik Ingenieurwissenschaften Engineering Computer science Electronics Systems engineering |
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