Multi-core cache hierarchies:
Gespeichert in:
1. Verfasser: | |
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Format: | Buch |
Sprache: | English |
Veröffentlicht: |
[San Rafael, Calif.]
Morgan & Claypool
2011
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Schriftenreihe: | Synthesis lectures on computer architecture
17 |
Schlagworte: | |
Beschreibung: | xiv, 137 p. ill. |
Internformat
MARC
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100 | 1 | |a Balasubramonian, Rajeev |e Verfasser |4 aut | |
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264 | 1 | |a [San Rafael, Calif.] |b Morgan & Claypool |c 2011 | |
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490 | 1 | |a Synthesis lectures on computer architecture |v 17 | |
650 | 4 | |a Cache memory | |
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Datensatz im Suchindex
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any_adam_object | |
author | Balasubramonian, Rajeev |
author_facet | Balasubramonian, Rajeev |
author_role | aut |
author_sort | Balasubramonian, Rajeev |
author_variant | r b rb |
building | Verbundindex |
bvnumber | BV040386427 |
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format | Book |
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id | DE-604.BV040386427 |
illustrated | Illustrated |
indexdate | 2024-07-10T00:22:54Z |
institution | BVB |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-025239844 |
oclc_num | 812245546 |
open_access_boolean | |
owner | DE-384 |
owner_facet | DE-384 |
physical | xiv, 137 p. ill. |
publishDate | 2011 |
publishDateSearch | 2011 |
publishDateSort | 2011 |
publisher | Morgan & Claypool |
record_format | marc |
series | Synthesis lectures on computer architecture |
series2 | Synthesis lectures on computer architecture |
spelling | Balasubramonian, Rajeev Verfasser aut Multi-core cache hierarchies Rajeev Balasubramonian ; Norman P. Jouppi ; Naveen Muralimanohar [San Rafael, Calif.] Morgan & Claypool 2011 xiv, 137 p. ill. txt rdacontent n rdamedia nc rdacarrier Synthesis lectures on computer architecture 17 Cache memory Computer architecture Cache-Speicher (DE-588)4362843-6 gnd rswk-swf Mehrkernprozessor (DE-588)7598578-0 gnd rswk-swf Mehrkernprozessor (DE-588)7598578-0 s Cache-Speicher (DE-588)4362843-6 s DE-604 Jouppi, Norman P. Sonstige oth Muralimanohar, Naveen Sonstige oth Synthesis lectures on computer architecture 17 (DE-604)BV023068349 17 |
spellingShingle | Balasubramonian, Rajeev Multi-core cache hierarchies Synthesis lectures on computer architecture Cache memory Computer architecture Cache-Speicher (DE-588)4362843-6 gnd Mehrkernprozessor (DE-588)7598578-0 gnd |
subject_GND | (DE-588)4362843-6 (DE-588)7598578-0 |
title | Multi-core cache hierarchies |
title_auth | Multi-core cache hierarchies |
title_exact_search | Multi-core cache hierarchies |
title_full | Multi-core cache hierarchies Rajeev Balasubramonian ; Norman P. Jouppi ; Naveen Muralimanohar |
title_fullStr | Multi-core cache hierarchies Rajeev Balasubramonian ; Norman P. Jouppi ; Naveen Muralimanohar |
title_full_unstemmed | Multi-core cache hierarchies Rajeev Balasubramonian ; Norman P. Jouppi ; Naveen Muralimanohar |
title_short | Multi-core cache hierarchies |
title_sort | multi core cache hierarchies |
topic | Cache memory Computer architecture Cache-Speicher (DE-588)4362843-6 gnd Mehrkernprozessor (DE-588)7598578-0 gnd |
topic_facet | Cache memory Computer architecture Cache-Speicher Mehrkernprozessor |
volume_link | (DE-604)BV023068349 |
work_keys_str_mv | AT balasubramonianrajeev multicorecachehierarchies AT jouppinormanp multicorecachehierarchies AT muralimanoharnaveen multicorecachehierarchies |