Aging analysis of digital integrated circuits:
Gespeichert in:
| 1. Verfasser: | |
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| Format: | Abschlussarbeit Buch |
| Sprache: | English |
| Veröffentlicht: |
2012
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| Schlagworte: | |
| Online-Zugang: | kostenfrei https://nbn-resolving.org/urn:nbn:de:bvb:91-diss-00120507-1096635-1-0 Inhaltsverzeichnis |
| Beschreibung: | 150 S. graph. Darst. |
Internformat
MARC
| LEADER | 00000nam a2200000 c 4500 | ||
|---|---|---|---|
| 001 | BV040234245 | ||
| 003 | DE-604 | ||
| 005 | 20130322 | ||
| 007 | t | ||
| 008 | 120604s2012 d||| m||| 00||| eng d | ||
| 035 | |a (OCoLC)796265450 | ||
| 035 | |a (DE-599)BVBBV040234245 | ||
| 040 | |a DE-604 |b ger |e rakwb | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-384 |a DE-473 |a DE-703 |a DE-1051 |a DE-824 |a DE-29 |a DE-12 |a DE-91 |a DE-19 |a DE-1049 |a DE-92 |a DE-739 |a DE-898 |a DE-355 |a DE-706 |a DE-20 |a DE-1102 | ||
| 100 | 1 | |a Lorenz, Dominik |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Aging analysis of digital integrated circuits |c Dominik Lorenz |
| 264 | 1 | |c 2012 | |
| 300 | |a 150 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 502 | |a München, Techn. Univ., Diss., 2012 | ||
| 655 | 7 | |0 (DE-588)4113937-9 |a Hochschulschrift |2 gnd-content | |
| 776 | 0 | 8 | |i Erscheint auch als |n Online-Ausgabe |o urn:nbn:de:bvb:91-diss-00120507-1096635-1-0 |
| 856 | 4 | 1 | |u http://mediatum.ub.tum.de/node?id=1096635 |x Verlag |z kostenfrei |3 Volltext |
| 856 | 4 | |u https://nbn-resolving.org/urn:nbn:de:bvb:91-diss-00120507-1096635-1-0 |x Resolving-System | |
| 856 | 4 | 2 | |m DNB Datenaustausch |q application/pdf |u http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=025090583&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |3 Inhaltsverzeichnis |
| 912 | |a ebook | ||
| 999 | |a oai:aleph.bib-bvb.de:BVB01-025090583 | ||
Datensatz im Suchindex
| _version_ | 1804149223147438081 |
|---|---|
| adam_text | IMAGE 1
CONTENTS
1. INTRODUCTION 9
1.1. OBJECTIVE OF THIS THESIS 10
1.2. SEMI-CUSTOM DESIGN FLOW 11
1.3. STRUCTURE OF THE THESIS 13
2. FUNDAMENTALS 15
2.1. (STATIC) TIMING ANALYSIS 15
2.1.1. GATE MODELS 15
2.1.2. TIMING GRAPH 17
2.1.3. INCREMENTAL TIMING ANALYSIS 18
2.1.4. SEQUENTIAL CIRCUITS 22
2.1.5. PATH ENUMERATION 23
2.2. STATE OF THE ART OF AGING ANALYSIS 27
2.2.1. CIRCUIT LEVEL 27
2.2.2. GATE LEVEL 28
3. AGING EFFECTS AND THEIR IMPACT ON STANDARD CELLS 35
3.1. AGING EFFECTS 35
3.1.1. NEGATIVE BIAS TEMPERATURE INSTABILITY 37
3.1.2. HOT CARRIER INJECTION 44
3.1.3. STRESS CONDITIONS IN CMOS LOGIC GATES 46
3.2. IMPACT ON GATE PERFORMANCE 49
3.2.1. IMPACT ON COMBINATIONAL GATES 49
3.2.2. IMPACT ON FLIP-FLOPS 53
3.2.3. IMPACT ON POWER DISSIPATION 56
3.3. TECHNOLOGY TREND 57
3.4. SUMMARY 60
4. AGING-AWARE STATIC TIMING ANALYSIS 6 3
4.1. AGING-AWARE STA FLOW 64
4.2. WORKLOAD DETERMINATION 66
4.3. AGEGATE: AGING-AWARE GATE MODEL 69
4.3.1. CANONICAL GATE MODEL 69
4.3.2. DEGRADATION EQUATIONS 70
4.3.3. CALCULATION OF STRESS PROBABILITIES 71
4.4. CHARACTERIZING THE STANDARD CELLS 77
4.4.1. OBTAINING THE SENSITIVITIES 78
5
HTTP://D-NB.INFO/1032622954
IMAGE 2
CONTENTS
4.4.2. OBTAINING THE INTERNAL GATE STRUCTURE 78
4.4.3. SIMPLIFICATION OF THE GATE MODEL 79
4.5. RESULTS 80
4.5.1. WAVEFORM DEPENDENCE OF PARAMETER DRIFT 80
4.5.2. COMPARISON OF AGEGATE, CIRCUIT-LEVEL SIMULATION AND MEASUREMENTS
80 4.5.3. AGING ANALYSIS RESULTS 81
4.6. SUMMARY 84
5. IDENTIFYING POSSIBLE CRITICAL PATHS IN AGED CIRCUITS 8 5
5.1. PREREQUISITES 86
5.2. IDENTIFICATION OF PCPS 86
5.2.1. SLACK REDUCTION STEP 87
5.2.2. P A T H DELAY REDUCTION STEP 88
5.2.3. ARRIVAL TIME REDUCTION STEP 88
5.2.4. DELAY TO SINK REDUCTION STEP 90
5.2.5. COMMON EDGE REDUCTION STEP 91
5.2.6. REMOVING EDGES AND NODES 94
5.3. REALISTIC AGED PATH DELAYS 94
5.3.1. GATE DELAY INTERVAL 96
5.3.2. REALISTIC AGED PATH DELAYS FOR AN INVERTER CHAIN 96
5.3.3. MAXIMAL AGED PATH DELAY OF A GENERAL PATH 97
5.3.4. MINIMAL AGED PATH DELAY FOR A GENERAL PATH 98
5.3.5. MINIMAL AGED CIRCUIT DELAY 101
5.3.6. USE OF MINIMAL AGED CIRCUIT DELAY IN REDUCTION STEPS 102
5.3.7. WRAP-UP 102
5.4. CONSIDERING PROCESS VARIATIONS 102
5.4.1. BLOCK-BASED STATISTICAL STATIC TIMING ANALYSIS 103
5.4.2. REPRESENTATION OF TIMING QUANTITIES 105
5.5. APPLICATIONS 106
5.5.1. AGING-AWARE TIMING MODEL FOR MODULES 106
5.5.2. MONITORING OF AGING CIRCUITS 108
5.6. RESULTS 113
5.6.1. MINIMAL AGED DELAY 113
5.6.2. NODE AND EDGE REDUCTION 114
5.6.3. POSSIBLE CRITICAL PATHS 115
5.7. SUMMARY 116
6. CONCLUSION 119
A. CONSTRAINTS FOR NAND AND NOR GATES 121
B. MORE DETAILED RESULTS FOR P C P IDENTIFICATION 123
BIBLIOGRAPHY 125
6
IMAGE 3
ACRONYMS
LIST OF SYMBOLS
CONTENTS
143
145
7
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| any_adam_object | 1 |
| author | Lorenz, Dominik |
| author_facet | Lorenz, Dominik |
| author_role | aut |
| author_sort | Lorenz, Dominik |
| author_variant | d l dl |
| building | Verbundindex |
| bvnumber | BV040234245 |
| collection | ebook |
| ctrlnum | (OCoLC)796265450 (DE-599)BVBBV040234245 |
| format | Thesis Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01441nam a2200325 c 4500</leader><controlfield tag="001">BV040234245</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20130322 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">120604s2012 d||| m||| 00||| eng d</controlfield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)796265450</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV040234245</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakwb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-384</subfield><subfield code="a">DE-473</subfield><subfield code="a">DE-703</subfield><subfield code="a">DE-1051</subfield><subfield code="a">DE-824</subfield><subfield code="a">DE-29</subfield><subfield code="a">DE-12</subfield><subfield code="a">DE-91</subfield><subfield code="a">DE-19</subfield><subfield code="a">DE-1049</subfield><subfield code="a">DE-92</subfield><subfield code="a">DE-739</subfield><subfield code="a">DE-898</subfield><subfield code="a">DE-355</subfield><subfield code="a">DE-706</subfield><subfield code="a">DE-20</subfield><subfield code="a">DE-1102</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Lorenz, Dominik</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Aging analysis of digital integrated circuits</subfield><subfield code="c">Dominik Lorenz</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="c">2012</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">150 S.</subfield><subfield code="b">graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="502" ind1=" " ind2=" "><subfield code="a">München, Techn. Univ., Diss., 2012</subfield></datafield><datafield tag="655" ind1=" " ind2="7"><subfield code="0">(DE-588)4113937-9</subfield><subfield code="a">Hochschulschrift</subfield><subfield code="2">gnd-content</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Online-Ausgabe</subfield><subfield code="o">urn:nbn:de:bvb:91-diss-00120507-1096635-1-0</subfield></datafield><datafield tag="856" ind1="4" ind2="1"><subfield code="u">http://mediatum.ub.tum.de/node?id=1096635</subfield><subfield code="x">Verlag</subfield><subfield code="z">kostenfrei</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="856" ind1="4" ind2=" "><subfield code="u">https://nbn-resolving.org/urn:nbn:de:bvb:91-diss-00120507-1096635-1-0</subfield><subfield code="x">Resolving-System</subfield></datafield><datafield tag="856" ind1="4" ind2="2"><subfield code="m">DNB Datenaustausch</subfield><subfield code="q">application/pdf</subfield><subfield code="u">http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=025090583&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA</subfield><subfield code="3">Inhaltsverzeichnis</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ebook</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-025090583</subfield></datafield></record></collection> |
| genre | (DE-588)4113937-9 Hochschulschrift gnd-content |
| genre_facet | Hochschulschrift |
| id | DE-604.BV040234245 |
| illustrated | Illustrated |
| indexdate | 2024-07-10T00:19:37Z |
| institution | BVB |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-025090583 |
| oclc_num | 796265450 |
| open_access_boolean | 1 |
| owner | DE-384 DE-473 DE-BY-UBG DE-703 DE-1051 DE-824 DE-29 DE-12 DE-91 DE-BY-TUM DE-19 DE-BY-UBM DE-1049 DE-92 DE-739 DE-898 DE-BY-UBR DE-355 DE-BY-UBR DE-706 DE-20 DE-1102 |
| owner_facet | DE-384 DE-473 DE-BY-UBG DE-703 DE-1051 DE-824 DE-29 DE-12 DE-91 DE-BY-TUM DE-19 DE-BY-UBM DE-1049 DE-92 DE-739 DE-898 DE-BY-UBR DE-355 DE-BY-UBR DE-706 DE-20 DE-1102 |
| physical | 150 S. graph. Darst. |
| psigel | ebook |
| publishDate | 2012 |
| publishDateSearch | 2012 |
| publishDateSort | 2012 |
| record_format | marc |
| spelling | Lorenz, Dominik Verfasser aut Aging analysis of digital integrated circuits Dominik Lorenz 2012 150 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier München, Techn. Univ., Diss., 2012 (DE-588)4113937-9 Hochschulschrift gnd-content Erscheint auch als Online-Ausgabe urn:nbn:de:bvb:91-diss-00120507-1096635-1-0 http://mediatum.ub.tum.de/node?id=1096635 Verlag kostenfrei Volltext https://nbn-resolving.org/urn:nbn:de:bvb:91-diss-00120507-1096635-1-0 Resolving-System DNB Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=025090583&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | Lorenz, Dominik Aging analysis of digital integrated circuits |
| subject_GND | (DE-588)4113937-9 |
| title | Aging analysis of digital integrated circuits |
| title_auth | Aging analysis of digital integrated circuits |
| title_exact_search | Aging analysis of digital integrated circuits |
| title_full | Aging analysis of digital integrated circuits Dominik Lorenz |
| title_fullStr | Aging analysis of digital integrated circuits Dominik Lorenz |
| title_full_unstemmed | Aging analysis of digital integrated circuits Dominik Lorenz |
| title_short | Aging analysis of digital integrated circuits |
| title_sort | aging analysis of digital integrated circuits |
| topic_facet | Hochschulschrift |
| url | http://mediatum.ub.tum.de/node?id=1096635 https://nbn-resolving.org/urn:nbn:de:bvb:91-diss-00120507-1096635-1-0 http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=025090583&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
| work_keys_str_mv | AT lorenzdominik aginganalysisofdigitalintegratedcircuits |