A new methodology for constraint-driven layout design of analog circuits:
Gespeichert in:
1. Verfasser: | |
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Format: | Abschlussarbeit Buch |
Sprache: | English |
Veröffentlicht: |
Düsseldorf
VDI-Verl.
2012
|
Ausgabe: | als Ms. gedr. |
Schriftenreihe: | Fortschritt-Berichte VDI
Reihe 20, Rechnerunterstützte Verfahren ; 424 |
Schlagworte: | |
Beschreibung: | XII, 94 S. Ill., graph. Darst. 21 cm |
ISBN: | 9783183424207 |
Internformat
MARC
LEADER | 00000nam a2200000 cb4500 | ||
---|---|---|---|
001 | BV040196055 | ||
003 | DE-604 | ||
005 | 20120707 | ||
007 | t | ||
008 | 120531s2012 ad|| m||| 00||| eng d | ||
020 | |a 9783183424207 |9 978-3-18-342420-7 | ||
035 | |a (OCoLC)796255595 | ||
035 | |a (DE-599)BVBBV040196055 | ||
040 | |a DE-604 |b ger | ||
041 | 0 | |a eng | |
049 | |a DE-91G |a DE-83 |a DE-210 | ||
082 | 0 | |a 621.38150285 |2 22//ger | |
084 | |a ZN 4904 |0 (DE-625)157419: |2 rvk | ||
084 | |a ZN 4920 |0 (DE-625)157421: |2 rvk | ||
100 | 1 | |a Nassaj, Ammar |e Verfasser |4 aut | |
245 | 1 | 0 | |a A new methodology for constraint-driven layout design of analog circuits |c Ammar Nassaj |
250 | |a als Ms. gedr. | ||
264 | 1 | |a Düsseldorf |b VDI-Verl. |c 2012 | |
300 | |a XII, 94 S. |b Ill., graph. Darst. |c 21 cm | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
490 | 1 | |a Fortschritt-Berichte VDI : Reihe 20, Rechnerunterstützte Verfahren |v 424 | |
502 | |a Zugl.: Dresden, Techn. Univ., Diss., 2012 | ||
650 | 0 | 7 | |a Constraint |g Künstliche Intelligenz |0 (DE-588)4314755-0 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Platzierung |g Mikroelektronik |0 (DE-588)4197293-4 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Entwurfsautomation |0 (DE-588)4312536-0 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Analogschaltung |0 (DE-588)4122796-7 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Lineare Optimierung |0 (DE-588)4035816-1 |2 gnd |9 rswk-swf |
655 | 7 | |0 (DE-588)4113937-9 |a Hochschulschrift |2 gnd-content | |
689 | 0 | 0 | |a Entwurfsautomation |0 (DE-588)4312536-0 |D s |
689 | 0 | 1 | |a Analogschaltung |0 (DE-588)4122796-7 |D s |
689 | 0 | 2 | |a Constraint |g Künstliche Intelligenz |0 (DE-588)4314755-0 |D s |
689 | 0 | 3 | |a Platzierung |g Mikroelektronik |0 (DE-588)4197293-4 |D s |
689 | 0 | 4 | |a Lineare Optimierung |0 (DE-588)4035816-1 |D s |
689 | 0 | |5 DE-604 | |
830 | 0 | |a Fortschritt-Berichte VDI |v Reihe 20, Rechnerunterstützte Verfahren ; 424 |w (DE-604)BV021786833 |9 424 | |
999 | |a oai:aleph.bib-bvb.de:BVB01-025052534 |
Datensatz im Suchindex
_version_ | 1804149195391631360 |
---|---|
any_adam_object | |
author | Nassaj, Ammar |
author_facet | Nassaj, Ammar |
author_role | aut |
author_sort | Nassaj, Ammar |
author_variant | a n an |
building | Verbundindex |
bvnumber | BV040196055 |
classification_rvk | ZN 4904 ZN 4920 |
ctrlnum | (OCoLC)796255595 (DE-599)BVBBV040196055 |
dewey-full | 621.38150285 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.38150285 |
dewey-search | 621.38150285 |
dewey-sort | 3621.38150285 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
edition | als Ms. gedr. |
format | Thesis Book |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01959nam a2200481 cb4500</leader><controlfield tag="001">BV040196055</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20120707 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">120531s2012 ad|| m||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9783183424207</subfield><subfield code="9">978-3-18-342420-7</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)796255595</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV040196055</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-91G</subfield><subfield code="a">DE-83</subfield><subfield code="a">DE-210</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.38150285</subfield><subfield code="2">22//ger</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 4904</subfield><subfield code="0">(DE-625)157419:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 4920</subfield><subfield code="0">(DE-625)157421:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Nassaj, Ammar</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">A new methodology for constraint-driven layout design of analog circuits</subfield><subfield code="c">Ammar Nassaj</subfield></datafield><datafield tag="250" ind1=" " ind2=" "><subfield code="a">als Ms. gedr.</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Düsseldorf</subfield><subfield code="b">VDI-Verl.</subfield><subfield code="c">2012</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XII, 94 S.</subfield><subfield code="b">Ill., graph. Darst.</subfield><subfield code="c">21 cm</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="1" ind2=" "><subfield code="a">Fortschritt-Berichte VDI : Reihe 20, Rechnerunterstützte Verfahren</subfield><subfield code="v">424</subfield></datafield><datafield tag="502" ind1=" " ind2=" "><subfield code="a">Zugl.: Dresden, Techn. Univ., Diss., 2012</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Constraint</subfield><subfield code="g">Künstliche Intelligenz</subfield><subfield code="0">(DE-588)4314755-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Platzierung</subfield><subfield code="g">Mikroelektronik</subfield><subfield code="0">(DE-588)4197293-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Entwurfsautomation</subfield><subfield code="0">(DE-588)4312536-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Analogschaltung</subfield><subfield code="0">(DE-588)4122796-7</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Lineare Optimierung</subfield><subfield code="0">(DE-588)4035816-1</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="655" ind1=" " ind2="7"><subfield code="0">(DE-588)4113937-9</subfield><subfield code="a">Hochschulschrift</subfield><subfield code="2">gnd-content</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Entwurfsautomation</subfield><subfield code="0">(DE-588)4312536-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Analogschaltung</subfield><subfield code="0">(DE-588)4122796-7</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="2"><subfield code="a">Constraint</subfield><subfield code="g">Künstliche Intelligenz</subfield><subfield code="0">(DE-588)4314755-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="3"><subfield code="a">Platzierung</subfield><subfield code="g">Mikroelektronik</subfield><subfield code="0">(DE-588)4197293-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="4"><subfield code="a">Lineare Optimierung</subfield><subfield code="0">(DE-588)4035816-1</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="830" ind1=" " ind2="0"><subfield code="a">Fortschritt-Berichte VDI</subfield><subfield code="v">Reihe 20, Rechnerunterstützte Verfahren ; 424</subfield><subfield code="w">(DE-604)BV021786833</subfield><subfield code="9">424</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-025052534</subfield></datafield></record></collection> |
genre | (DE-588)4113937-9 Hochschulschrift gnd-content |
genre_facet | Hochschulschrift |
id | DE-604.BV040196055 |
illustrated | Illustrated |
indexdate | 2024-07-10T00:19:10Z |
institution | BVB |
isbn | 9783183424207 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-025052534 |
oclc_num | 796255595 |
open_access_boolean | |
owner | DE-91G DE-BY-TUM DE-83 DE-210 |
owner_facet | DE-91G DE-BY-TUM DE-83 DE-210 |
physical | XII, 94 S. Ill., graph. Darst. 21 cm |
publishDate | 2012 |
publishDateSearch | 2012 |
publishDateSort | 2012 |
publisher | VDI-Verl. |
record_format | marc |
series | Fortschritt-Berichte VDI |
series2 | Fortschritt-Berichte VDI : Reihe 20, Rechnerunterstützte Verfahren |
spelling | Nassaj, Ammar Verfasser aut A new methodology for constraint-driven layout design of analog circuits Ammar Nassaj als Ms. gedr. Düsseldorf VDI-Verl. 2012 XII, 94 S. Ill., graph. Darst. 21 cm txt rdacontent n rdamedia nc rdacarrier Fortschritt-Berichte VDI : Reihe 20, Rechnerunterstützte Verfahren 424 Zugl.: Dresden, Techn. Univ., Diss., 2012 Constraint Künstliche Intelligenz (DE-588)4314755-0 gnd rswk-swf Platzierung Mikroelektronik (DE-588)4197293-4 gnd rswk-swf Entwurfsautomation (DE-588)4312536-0 gnd rswk-swf Analogschaltung (DE-588)4122796-7 gnd rswk-swf Lineare Optimierung (DE-588)4035816-1 gnd rswk-swf (DE-588)4113937-9 Hochschulschrift gnd-content Entwurfsautomation (DE-588)4312536-0 s Analogschaltung (DE-588)4122796-7 s Constraint Künstliche Intelligenz (DE-588)4314755-0 s Platzierung Mikroelektronik (DE-588)4197293-4 s Lineare Optimierung (DE-588)4035816-1 s DE-604 Fortschritt-Berichte VDI Reihe 20, Rechnerunterstützte Verfahren ; 424 (DE-604)BV021786833 424 |
spellingShingle | Nassaj, Ammar A new methodology for constraint-driven layout design of analog circuits Fortschritt-Berichte VDI Constraint Künstliche Intelligenz (DE-588)4314755-0 gnd Platzierung Mikroelektronik (DE-588)4197293-4 gnd Entwurfsautomation (DE-588)4312536-0 gnd Analogschaltung (DE-588)4122796-7 gnd Lineare Optimierung (DE-588)4035816-1 gnd |
subject_GND | (DE-588)4314755-0 (DE-588)4197293-4 (DE-588)4312536-0 (DE-588)4122796-7 (DE-588)4035816-1 (DE-588)4113937-9 |
title | A new methodology for constraint-driven layout design of analog circuits |
title_auth | A new methodology for constraint-driven layout design of analog circuits |
title_exact_search | A new methodology for constraint-driven layout design of analog circuits |
title_full | A new methodology for constraint-driven layout design of analog circuits Ammar Nassaj |
title_fullStr | A new methodology for constraint-driven layout design of analog circuits Ammar Nassaj |
title_full_unstemmed | A new methodology for constraint-driven layout design of analog circuits Ammar Nassaj |
title_short | A new methodology for constraint-driven layout design of analog circuits |
title_sort | a new methodology for constraint driven layout design of analog circuits |
topic | Constraint Künstliche Intelligenz (DE-588)4314755-0 gnd Platzierung Mikroelektronik (DE-588)4197293-4 gnd Entwurfsautomation (DE-588)4312536-0 gnd Analogschaltung (DE-588)4122796-7 gnd Lineare Optimierung (DE-588)4035816-1 gnd |
topic_facet | Constraint Künstliche Intelligenz Platzierung Mikroelektronik Entwurfsautomation Analogschaltung Lineare Optimierung Hochschulschrift |
volume_link | (DE-604)BV021786833 |
work_keys_str_mv | AT nassajammar anewmethodologyforconstraintdrivenlayoutdesignofanalogcircuits |