Introduction to digital systems: modeling, synthesis, and simulation using VHDL
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Hoboken, NJ
Wiley
2011
|
| Schlagworte: | |
| Beschreibung: | X, 215 S. graph. Darst. |
| ISBN: | 9780470900550 9781118007716 |
Internformat
MARC
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| 100 | 1 | |a Ferdjallah, Mohammed |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Introduction to digital systems |b modeling, synthesis, and simulation using VHDL |c Mohammed Ferdjallah |
| 264 | 1 | |a Hoboken, NJ |b Wiley |c 2011 | |
| 300 | |a X, 215 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 4 | |a Digital electronics | |
| 650 | 4 | |a Digital electronics |x Computer simulation | |
| 650 | 4 | |a VHDL (Computer hardware description language) | |
| 650 | 0 | 7 | |a Digitalelektronik |0 (DE-588)4260328-6 |2 gnd |9 rswk-swf |
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Datensatz im Suchindex
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|---|---|
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| author | Ferdjallah, Mohammed |
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| dewey-raw | 621.39/2 |
| dewey-search | 621.39/2 |
| dewey-sort | 3621.39 12 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
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| id | DE-604.BV039520110 |
| illustrated | Illustrated |
| indexdate | 2025-02-20T06:42:05Z |
| institution | BVB |
| isbn | 9780470900550 9781118007716 |
| language | English |
| lccn | 2010041036 |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-024372612 |
| oclc_num | 750777874 |
| open_access_boolean | |
| owner | DE-1050 DE-573 DE-862 DE-BY-FWS DE-634 DE-83 |
| owner_facet | DE-1050 DE-573 DE-862 DE-BY-FWS DE-634 DE-83 |
| physical | X, 215 S. graph. Darst. |
| publishDate | 2011 |
| publishDateSearch | 2011 |
| publishDateSort | 2011 |
| publisher | Wiley |
| record_format | marc |
| spellingShingle | Ferdjallah, Mohammed Introduction to digital systems modeling, synthesis, and simulation using VHDL Digital electronics Digital electronics Computer simulation VHDL (Computer hardware description language) Digitalelektronik (DE-588)4260328-6 gnd VHDL (DE-588)4254792-1 gnd |
| subject_GND | (DE-588)4260328-6 (DE-588)4254792-1 |
| title | Introduction to digital systems modeling, synthesis, and simulation using VHDL |
| title_auth | Introduction to digital systems modeling, synthesis, and simulation using VHDL |
| title_exact_search | Introduction to digital systems modeling, synthesis, and simulation using VHDL |
| title_full | Introduction to digital systems modeling, synthesis, and simulation using VHDL Mohammed Ferdjallah |
| title_fullStr | Introduction to digital systems modeling, synthesis, and simulation using VHDL Mohammed Ferdjallah |
| title_full_unstemmed | Introduction to digital systems modeling, synthesis, and simulation using VHDL Mohammed Ferdjallah |
| title_short | Introduction to digital systems |
| title_sort | introduction to digital systems modeling synthesis and simulation using vhdl |
| title_sub | modeling, synthesis, and simulation using VHDL |
| topic | Digital electronics Digital electronics Computer simulation VHDL (Computer hardware description language) Digitalelektronik (DE-588)4260328-6 gnd VHDL (DE-588)4254792-1 gnd |
| topic_facet | Digital electronics Digital electronics Computer simulation VHDL (Computer hardware description language) Digitalelektronik VHDL |
| work_keys_str_mv | AT ferdjallahmohammed introductiontodigitalsystemsmodelingsynthesisandsimulationusingvhdl |
THWS Schweinfurt Zentralbibliothek Lesesaal
| Signatur: |
2000 ZN 5620 F347 |
|---|---|
| Exemplar 1 | ausleihbar Verfügbar Bestellen |